A Clock Control Circuit And Method

Abstract

This invention provides a clock control circuit, which can be added to any pipeline-processor to solve timing problems arising from variations due to process outcome and environmental conditions. Critical instructions are detected (instructions that exercise critical paths) in conjunction with environmental sensing (such as process, temperature and voltage). This information is used to control cycle stealing.

Description

technical field [0001] The present invention relates to the control of clock signals used by processors and, in particular, to selectively performing cycle stealing when needed. Background technique [0002] Design and manufacturing techniques have been used to reduce transistor size so that more and more transistors can be integrated on a single integrated circuit (IC), such as a system-on-chip (SoC). The evolution of technology also introduces significant challenges, such as high defect rates and device parameter variations. This change changes the propagation delay of the CMOS circuit, which in turn leads to the failure of the function of the IC. [0003] Traditional SoC design approaches meet timing requirements by considering "worst case" (WC) operating conditions, resulting in lower maximum operating frequencies and increased area and power overhead. [0004] Another "typical value" design method provides a better balance between area and performance and power consum...

AI Technical Summary

Problems solved by technology

[0015] Traditionally, error detection and determination should be completed within one or half a clock cycle, which is difficult to achieve for large processors, and the above-mentioned methods fail to solve this problem

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