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Memory access using address bit rearrangement

A memory access and rearrangement technology, which is applied in the direction of static memory, memory system, digital memory information, etc., can solve the problem of data group access that does not allow data transmission

Active Publication Date: 2017-08-15
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this access method is that it generally does not allow data group access in which data is transmitted in one continuous sequence

Method used

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  • Memory access using address bit rearrangement
  • Memory access using address bit rearrangement
  • Memory access using address bit rearrangement

Examples

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Embodiment Construction

[0029] The present disclosure relates to a device including a memory having an array of blocks addressable using address bits, and more particularly to a device including a memory and a rearrangement circuit coupled to the memory and configured to Address bits are rearranged so that data blocks are virtually rearranged during memory accesses. By rearranging the address bits, the data being written / read from memory can be effectively interleaved or de-interleaved. This rearrangement is configured at the beginning of memory accesses and allows standard block accesses for data block transfers, which significantly increases the speed of transfers.

[0030] figure 1 A schematic diagram of a circuit 100 according to an exemplary embodiment is shown. More specifically, the circuit 100 includes a memory 110 and a rearrangement circuit 120 . Memory 110 has an array of blocks addressable for writing data to and / or reading data from a block using address bits A0-A8. A rearrangement c...

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Abstract

The present invention involves a memory access arranged in the use of the site, and a device is disclosed, which includes: memory, which has a block array that can be addressable; and the heavy arrangement circuit is coupled to the memory and is configured forIn the re -arrangement address position, the data block is re -arranged virtually during the memory access.

Description

technical field [0001] The present disclosure relates to memory access using address bit permutation. Background technique [0002] Memory, such as random access memory (RAM), is a form of data storage. The memory may have an array of blocks addressable using address bits to access the blocks during a read or write operation. RAM allows data to be accessed in any random order. [0003] In a radar application, by way of example, large amounts of data are written to memory in an interleaved fashion. This data must be deinterleaved before being fed to a Fast Fourier Transform (FFT) accelerator, and then the data must be reordered again before the second stage of the FFT process. Data is organized in an array of memory blocks in an interleaved fashion along its dimensions. [0004] Memory is typically accessed using a direct memory access (DMA) controller with an address counter that skips a programmable jump width of eg 2, 4 or 8 bytes in the memory address space. A disadv...

Claims

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Application Information

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IPC IPC(8): G06F12/02G06F13/16
CPCG06F13/1684G06F12/0207G09G2360/123G09G5/395G06F12/10G06F12/0646G11C8/12G11C11/4082
Inventor L·阿纳斯塔索维
Owner INFINEON TECH AG