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Digitally controlled edge interpolators (dcei) for digital-to-time converters (dtc)

A technology of interpolator and converter, applied in the field of digital-to-time converter

Inactive Publication Date: 2018-10-26
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

To avoid desensitizing the receivers of such devices, noise floor requirements may place strict limits on the quantization noise levels of DTC and DPA of DPTX

Method used

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  • Digitally controlled edge interpolators (dcei) for digital-to-time converters (dtc)
  • Digitally controlled edge interpolators (dcei) for digital-to-time converters (dtc)
  • Digitally controlled edge interpolators (dcei) for digital-to-time converters (dtc)

Examples

Experimental program
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Embodiment Construction

[0032] Embodiments of the technology described herein relate to digital-to-time converter (DTC) architectures that include digitally controlled edge interpolators (DCEIs) for generating fine delay / phase signals that are self-aligned to coarse delay / phase segments, and Calibration techniques are not required. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the embodiments disclosed herein. It will be apparent, however, to one skilled in the relevant art that the embodiments disclosed herein can be practiced without one or more of these specific details, or with other methods, components, materials, or the like. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the description.

[0033] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic ...

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Abstract

A digital-to-time converter (DTC) for a digital polar transmitter (DPT) includes a coarse delay / phase section and a fine delay / phase section. The coarse delay / phase section generates even delay / phase signals and odd delay / phase signals. The fine / phase delay section receives the even coarse phase signal and the odd coarse phase signal and is responsive to the fine delay / phase control signal to generate a fine delay / phase output signal that is an interpolation of the even delay / phase signal and the odd delay / phase signal. In one exemplary embodiment, the fine delay / phase control signal comprises a binary signal having 2N values, and the fine delay / phase section comprises 2N interpolators. Each interpolator is coupled to the even and odd coarse phase signals and is controlled by the fine delay / phase control signal to respond to either the even coarse phase signal or the odd coarse phase signal based on the value of the fine delay / phase control signal.

Description

technical field [0001] Embodiments of the systems and techniques described herein relate to digital polar transmitters (DPTs). More specifically, embodiments of systems and techniques relate to digital-to-time converters (DTCs) for DPTs that generate fine delay / phase signals that are self-aligned to coarse delay / phase segments of the DTC. Background technique [0002] The digital polar transmitter (DPTX) architecture offers reduced size and reduced power consumption compared to conventional analog radio transmitter architectures. The DPTX architecture consists of two main functional blocks. A major functional block is the digital-to-time converter (DTC), which uses the phase information of the signal to be transmitted to modulate the local oscillator (LO) carrier. Another major functional block is the digital power amplifier (DPA), which amplitude-modulates the signal to be transmitted onto the phase-modulated LO signal, thereby producing a reconstruction of the original s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/20
CPCH03F1/0216H03F3/2175H03F3/245H04L27/36
Inventor O.德加尼R.班恩A.拉维
Owner INTEL CORP