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Array substrate, manufacturing method thereof, and display device

A technology of array substrates and substrate substrates, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve the problems of high power consumption of display devices, large power consumption of gate drive circuits, complex timing of gate drive signals, etc. problem, to achieve the effect of simple timing, low power consumption and sufficient charging

Active Publication Date: 2017-07-28
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The inventors have found that in the above charging process, the gate drive signal needs to be applied to the two gate lines at the same time, the timing of the gate drive signal is complicated, the power consumption of the gate drive circuit is large, the power consumption of the display device is large, and it needs Change the structure of the existing gate drive circuit

Method used

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  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device

Examples

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Embodiment 1

[0073] An embodiment of the present invention provides an array substrate, such as figure 1 and figure 2 As shown, the array substrate includes a base substrate 1, gate lines 2 and pixels located on the base substrate 1, each pixel includes a first thin film transistor 3 and a pixel electrode 4, the nth gate line 2 controls the nth row A thin film transistor 3 charges the pixel electrode 4 in the nth row, each pixel also includes a second thin film transistor 5, and the n-1th gate line 2 controls the second thin film transistor 5 in the nth row to charge the pixel electrode 4 in the nth row Precharge, wherein, n is a positive integer greater than or equal to 2. It should be noted that the maximum value of n is the number of gate lines 2 on the array substrate.

[0074] It should be noted that, the first thin film transistors in the nth row and the pixel electrodes in the nth row both refer to the first thin film transistors and pixel electrodes controlled by the nth gate li...

Embodiment 2

[0092] An embodiment of the present invention provides a method for manufacturing the array substrate described in Embodiment 1, which can form Figure 1-4 As shown in the structure, the manufacturing method includes as Figure 5 The steps shown are as follows:

[0093] Step S501, forming a pattern including gate lines.

[0094] Step S502, forming a first thin film transistor and a second thin film transistor.

[0095] Step S503, forming a pixel electrode to form a pixel including a first thin film transistor, a second thin film transistor and a pixel electrode.

[0096] Among them, the nth gate line 2 controls the first thin film transistor 3 of the nth row to charge the nth row of pixel electrodes 4, and the n-1th gate line 2 controls the nth row of the nth second thin film transistor 5 to charge the nth row of pixel electrodes 4. Perform precharging, where n is a positive integer greater than or equal to 2. It should be noted that the maximum value of n is the number of...

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Abstract

The invention discloses an array substrate, a manufacturing method thereof and a display device and belongs to the technical field of displaying. Under the condition that time sequences of gate driving signals are simple, power consumption of gate driving circuits is small and a structure of an existing gate driving circuit is not changed, pixel electrodes can be pre-charging. The array substrate comprises a substrate body, gate lines on the substrate body and pixels, every pixel comprises a first thin film transistor and a pixel electrode, and an nth gate line controls the first thin film transistor of an nth row to charge the pixel electrode of the nth row. The array substrate is characterized in that every pixel further comprises a second thin film transistor, and an n-1th gate line controls the second thin film transistor of the nth row to pre-charge the pixel electrode of the nth row, wherein n is a positive integer equal to or larger than 2. The embodiment of the invention further comprises the display device comprising the array substrate.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] The pixels on the array substrate can be of positive polarity (the voltage of the pixel electrode is higher than the common voltage) or negative polarity (the voltage of the pixel electrode is lower than the common voltage). The impurity particles will gradually gather at the two electrode ends of the liquid crystal molecules, thereby affecting the normal deflection of the liquid crystal molecules. Therefore, in order to avoid the above situation, the polarities of the same pixel in two adjacent frames can be reversed. At this time, the adjacent The voltage span of the pixel electrodes of the two frames is relatively large, while the charging time of the pixel electrodes of one row is relatively short, so that the pixel electrodes are not fully charged. [0003] Speci...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/77
Inventor 姚之晓田明刘家荣
Owner BOE TECH GRP CO LTD