Pull-up resistor circuit
A resistance circuit and voltage technology, applied in the direction of logic circuit connection/interface layout, etc., to improve reliability and eliminate backflow current.
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Embodiment 1
[0061] image 3 is a circuit diagram of the pull-up resistor circuit of this embodiment. refer to image 3 , the pull-up resistor circuit includes a power supply terminal VDD, an output terminal OUT, a first PMOS transistor MP1 and a transmission unit. The transmission unit includes a second PMOS transistor MP2 , a third PMOS transistor MP3 and a control signal generation unit, and the control signal generation unit includes a first switch unit 31 and a second switch unit 32 . The power supply terminal VDD, the output terminal OUT, the first PMOS transistor MP1, the second PMOS transistor MP2 and the third PMOS transistor MP3 are connected with figure 2 Similar and will not be repeated here.
[0062] In this embodiment, the first switch unit 31 includes a fourth PMOS transistor MP4, the second switch unit 32 includes a fifth PMOS transistor MP5 and a first NMOS transistor MN1, and when the first switch unit 31 is turned on The impedance is smaller than the impedance when ...
Embodiment 2
[0074] Figure 4 is a circuit diagram of the pull-up resistor circuit of this embodiment. refer to Figure 4 , the pull-up resistor circuit includes a power supply terminal VDD, an output terminal OUT, a first PMOS transistor MP1 and a transmission unit, and the transmission unit includes a second PMOS transistor MP2, a third PMOS transistor MP3 and a control signal generating unit.
[0075] The power supply terminal VDD, the output terminal OUT, the first PMOS transistor MP1, the second PMOS transistor MP2 and the third PMOS transistor MP3 are connected with figure 2 Similar and will not be repeated here. The control signal generation unit includes a first switch unit 41 and a second switch unit 42 , the first switch unit 41 includes a fourth PMOS transistor MP4 , and the fourth PMOS transistor MP4 can refer to the description in Embodiment 1.
[0076] The second switch unit 42 includes a second NMOS transistor MN2 and a third NMOS transistor MN3.
[0077] Specifically, ...
Embodiment 3
[0084] The pull-up resistor circuit of this embodiment includes a power supply terminal, an output terminal, a first PMOS transistor and a transmission unit, and also includes a bias voltage generation circuit suitable for generating a bias voltage Vbias. The power supply terminal, output terminal, first PMOS transistor and transmission unit are similar to those in Embodiment 1 and Embodiment 2, and will not be repeated here.
[0085] Figure 5 is a circuit diagram of the bias voltage generation circuit of this embodiment. refer to Figure 5 , the bias voltage generation circuit includes a sixth PMOS transistor MP6 and a seventh PMOS transistor MP7.
[0086] Specifically, the gate of the sixth PMOS transistor MP6 is connected to the drain of the seventh PMOS transistor MP7 and the output terminal OUT, and the source of the sixth PMOS transistor MP6 is connected to the power supply terminal VDD and the seventh PMOS transistor MP7. The gate of MP7, the drain of the sixth PMOS...
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