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Floating gate of flash memory with etox structure and manufacturing method thereof

A manufacturing method and floating gate technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as large ETOX structure, low flash memory yield rate, etc., and achieve the effect of improving yield rate

Active Publication Date: 2018-10-30
GIGADEVICE SEMICON (BEIJING) INC
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  • Abstract
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Problems solved by technology

[0004] In view of this, an embodiment of the present invention provides a floating gate of a flash memory with an ETOX structure and a manufacturing method thereof, so as to solve the problem of the yield rate of the flash memory with an ETOX structure caused by the excessive aspect ratio of the trench forming the floating gate in the prior art. Reduced technical issues

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  • Floating gate of flash memory with etox structure and manufacturing method thereof
  • Floating gate of flash memory with etox structure and manufacturing method thereof
  • Floating gate of flash memory with etox structure and manufacturing method thereof

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Embodiment Construction

[0043] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only parts related to the present invention are shown in the drawings but not all content.

[0044] An embodiment of the present invention provides a method for manufacturing a floating gate of a flash memory with an ETOX structure. figure 1 It is a flow chart of the manufacturing method of the floating gate of the flash memory of the ETOX structure of the embodiment of the present invention; Figure 2a-Figure 2h It is a structural cross-sectional schematic diagram of each stage in the manufacturing method of the floating gate of the flash memory with the ETOX structure according to the embodiment of the present inven...

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Abstract

The invention discloses a floating of an ETOX-structure flash memory and a manufacture method thereof. The manufacture method comprises: forming a hard mask layer structure, a liner oxide layer structure, an active area, and shallow trench isolation; removing a part of the hard mask layer structure and exposing the first part of the shallow trench isolation; transversely removing a part of the first part of the shallow trench isolation; removing the rest of the hard mask layer structure; forming a well region in the active area, removing the liner oxide layer structure to obtain the first trench between the shallow trench isolation; and successively forming a tunnel oxide layer and a floating gate in the first trench. According to the method, the opening of the first trench between the shallow trench isolation can enlarged and the depth-to-width ratio of the first trench can be decreased. Therefore, a void can be prevented when the floating gate is formed in the first trench, thereby improving the yield of the ETOX-structure flash memory.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a floating gate of a flash memory with an ETOX structure and a manufacturing method thereof. Background technique [0002] ETOX (EPROM with Tunnel Oxide or Erasable Programmable Read Only Memory with Tunnel Oxide, Erasable Programmable Read Only Register Tunnel Oxide) flash memory is a kind of non-volatile flash memory, which is characterized by applications that can run directly in the flash memory , it is no longer necessary to read the code into the random access memory of the system, so that it has higher transmission efficiency. Therefore, the flash memory of this structure is widely used. [0003] The process of the existing ETOX flash memory is at the 65nm node, and most of the polysilicon (Polysilicon) floating gate (Floating Gate) of the flash memory with this structure adopts the method of self-alignment (Self-Alignment) of the active area (Active Area). form. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/762
Inventor 冯骏舒清明
Owner GIGADEVICE SEMICON (BEIJING) INC