Method and device for sorting combinations of mutants, test cases and random seeds in mutation testing

A test case, random seed technology, applied in special data processing applications, instruments, calculations, etc., to reduce invalid simulation, reduce the probability of selecting equivalent mutations, and improve efficiency

Active Publication Date: 2016-02-17
IBM CORP
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Problems solved by technology

Still take the above "AND" logic gate as an example, if the "AND" is mutated into "OR", and there are only two test cases, one is for the input signal , and the other

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  • Method and device for sorting combinations of mutants, test cases and random seeds in mutation testing
  • Method and device for sorting combinations of mutants, test cases and random seeds in mutation testing
  • Method and device for sorting combinations of mutants, test cases and random seeds in mutation testing

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Embodiment Construction

[0028] Preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although preferred embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0029] figure 1 A block diagram of an exemplary computer system / server 12 suitable for use in implementing embodiments of the invention is shown. figure 1 The computer system / server 12 shown is only an example and should not impose any limitation on the functions and scope of use of the embodiments of the present invention.

[0030] Such as figure 1 As shown, computer system / server 12 takes the form of a general purpose computing device. ...

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Abstract

The invention discloses a method and a device for sorting combinations of mutants, test cases and random seeds in mutation testing. The method comprises: according to a signal of a test case target, obtaining a logic gate related with the signal of the test case target and a mutant on the related logic gate for a compiled to-be-tested integrated circuit; calculating the distance between the mutant and the signal of the test case target; performing circuit simulation on the compiled to-be-tested integrated circuit to obtain an activation cycle number corresponding to the combinations of the mutants, the test cases and the random seeds; obtaining an activation cycle number variance corresponding to the combinations of the mutants and the test cases; and according to the distance, the activation cycle number and the activation cycle number variance, sorting the combinations of the mutants, the test cases and the random seeds. The method and the device can reduce the probability of selecting equal mutants in mutation simulation.

Description

technical field [0001] The invention relates to the evaluation of the quality of an integrated circuit test platform, and more particularly relates to a method and equipment for sorting combinations of mutations, test cases and random seeds in mutation testing. Background technique [0002] Functional Verification (Functional Verification) is a method to ensure the correctness of integrated circuit functions, and occupies a crucial position in the integrated circuit design process. A high-quality functional verification platform is the premise to ensure the credibility and reliability of the entire process, thereby ensuring the correctness of integrated circuit functions. Mutation Testing (MutationTesting) can evaluate the quality of the functional verification platform, so that verification engineers can quantitatively give evaluation standards. [0003] The basic steps of the current mutation test are divided into three parts: 1) After generating mutations for multiple lo...

Claims

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Application Information

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IPC IPC(8): G06F17/30
CPCG06F30/398
Inventor 苟鹏飞刘丹刘洋李阳B·霍佩
Owner IBM CORP
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