Implementation method for parallel LFSR (Linear Feedback Shift Register) structure
An implementation method and construction technology, which are applied in the field of designing and applying a high-speed parallel LFSR architecture to process data hardware systems
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0036] Below in conjunction with specific embodiment, further illustrate the present invention, should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention, after having read the present invention, those skilled in the art will understand various equivalent forms of the present invention All modifications fall within the scope defined by the appended claims of the present application.
[0037] The implementation method of parallel LFSR architecture, which can be used to construct parallel BCH code encoder or CRC check encoder, the construction method of transformation matrix in the existing state space transformation method used to construct parallel LFSR architecture, the new transformation The matrix is constructed as follows: first construct a vector b of the same dimension as the matrix row vector 2 =(1,b 1 ,b 2 ,...,b n-k-1 ) as the first row of the matrix, b 2 The fir...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More - R&D
- Intellectual Property
- Life Sciences
- Materials
- Tech Scout
- Unparalleled Data Quality
- Higher Quality Content
- 60% Fewer Hallucinations
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com
