Data feedback method, buffer, controller and system

A feedback data and buffer technology, applied in the field of feedback data, can solve the problems of increasing the area of ​​the whole chip and reducing the integration degree of the on-chip system, and achieve the effect of improving the integration degree

Active Publication Date: 2017-01-04
ACTIONS ZHUHAI TECH CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] To sum up, in the current system-on-chip design, a large amount of Code RAM needs to be designed to store codes that reside in memory in different operating scenarios, which increases the overall chip area of ​​the system-on-chip and reduces the integration of the system-on-chip

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  • Data feedback method, buffer, controller and system
  • Data feedback method, buffer, controller and system
  • Data feedback method, buffer, controller and system

Examples

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Embodiment Construction

[0095]In the embodiment of the present invention, after the buffer receives the first read command sent by the processor through the controller, it judges whether the first data address corresponding to the first read command exists in the address mapping relationship; After the first data address corresponding to the first read command exists in the address mapping relationship, determine the second data address corresponding to the first data address according to the address mapping relationship; When the data corresponding to the data address is in the buffer, the data is fed back to the processor as the data to be acquired by the processor. Since the buffer according to the embodiment of the present invention determines that the first data address corresponding to the first read command exists in the address mapping relationship according to the received first read command and the address mapping relationship sent by the processor through the controller, the first data addr...

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Abstract

Embodiments of the invention disclose a data feedback method, a buffer, a controller and a system, and aim to solve the problems that the whole chip area of a system on chip is enlarged and the integration level of the system on chip is reduced because a large amount of Code RAMs need to be designed for storing codes, resident in a memory, of different running scenes in system-on-chip design in the prior art. The method comprises the steps that the buffer judges whether a first data address corresponding to a first read command exists in an address mapping relationship or not after the first read command sent by a processor through the controller is received; the buffer determines a second data address corresponding to the first data address according to the address mapping relationship after determining that the first data address corresponding to the first read command exists in the address mapping relationship; and the buffer feeds back data as data required to be acquired by the processor to the processor when determining that the data corresponding to the second data address is in the buffer. By adopting the method provided by the invention, the integration level of the system on chip can be improved.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to a data feedback method, buffer, controller and system. Background technique [0002] The system on chip refers to the integration of a complete system on a single chip. The complete system generally includes: processor, memory, and peripheral circuits. Generally, software codes and the like of the system on chip are stored in an external memory. Such as figure 1 As shown, the schematic diagram of the structure of the system on a chip, from figure 1 As can be seen from the above, the system on a chip includes: Bus Bridge (bus bridge), CPU (Central Processing Unit, central processing unit), Memory Controller (storage controller), ROM (Read Only Memory, read-only memory), Data RAM (RAM, Random Access Memory, random access memory; data random access memory), Code RAM (code random access memory), SPI Controller (Serial Peripheral Interface, serial peripheral interface; serial per...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/08
Inventor 赵红涛麦键樟周晓磊唐振中
Owner ACTIONS ZHUHAI TECH CO
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