Double-spectrum camera
A camera and dual-spectrum technology, applied in the field of cameras, can solve the problems of fusion, inability to complete infrared images and visible light images, etc., achieve the effects of low heat generation, real-time detection and tracking, and strict synchronization
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Embodiment 1
[0051] This embodiment provides a dual-spectrum camera capable of image fusion processing for real-time monitoring of a monitoring area. like figure 1 As shown, the dual-spectrum camera mainly includes an infrared imaging module 110 , a visible light imaging module 120 and an image synthesis module 130 . Wherein, the infrared imaging module 110 collects a thermal imaging image sequence of the monitoring area, and the visible light imaging module 120 collects a visible light image sequence. The image synthesis module 130 is connected with the infrared imaging module 110, receives the thermal imaging image sequence, and then identifies the target area in the thermal imaging image sequence of the monitoring area; the image synthesis module 130 is also connected with the visible light imaging module 120, receives the visible light image sequence, and combines the same Data fusion is performed on the thermal imaging image sequence and the visible light image sequence of the target...
Embodiment 2
[0077] The structure of the dual-spectrum camera provided in this embodiment is basically the same as that in Embodiment 1.
[0078] like Figure 7As shown, the difference is that the parallel-to-serial conversion unit 114 in the infrared imaging module 110 is implemented by programming a field-programmable gate array (Field-Programmable Gate Array, FPGA for short), and converts thermal imaging image information into a serial low-voltage differential signal (Low - Thermal imaging image sequence in Voltage Differential Signaling (LVDS for short) format, the repeating chip 116 adopts LVDS repeating chip, which can realize enhanced processing of LVDS signal.
[0079] The repeating chip 116 is connected to the image synthesis module 130 through an LVDS interface line. Wherein, the image synthesis module 130 includes an image combination sub-module 131 and an image processing chip 132 .
[0080] The image merging subunit 131 is preferably implemented by FPGA, and combines the the...
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