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Two-level all-parallel input ring shift left LDPC coder

An encoder and circulant matrix technology, applied in the field of channel coding, can solve the problems of low operating frequency, low throughput, long delay of addition operation, etc.

Inactive Publication Date: 2017-02-22
RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Existing solutions for fully parallel input QC-LDPC encoders in communication systems such as figure 1 As shown, the main disadvantage of this scheme is that the modulo 2 adder has e×b input terminals, and the delay of the addition operation is long, which will cause the encoder to have low operating frequency and low throughput

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Embodiment Construction

[0014] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0015] The row and column weights of a circular matrix are the same, denoted as w. If w=0, then the circulant matrix is ​​an all-zero matrix. If w=1, then the circulant matrix is ​​permutable, called a permutation matrix, which can be obtained by cyclically shifting the identity matrix I to the right by several bits. The check matrix H of the QC-LDPC code is composed of c×t b×b order circulant matrices H j,k (1≤j≤c, 1≤k≤t, t=e+c) constitute the following array:

[0016]

[0017] Usually, any circulant matrix in the parity check matrix H is either an all-zero matrix (w=0) or a permutation matrix (w=1). Let the circular matrix H j,k the firs...

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Abstract

The invention provides a QC-LDPC (Quasi Cyclic-Low Density Parity Check) coder based on a two-level pipeline. The QC-LDPC coder includes 1 multiplier of sparse matrix and vector and 1 multiplier of vector and high density matrix. The multiplier of sparse matrix and vector can realize multiplication of sparse matrix and vector. The multiplier of vector and high density matrix uses an all-parallel input ring shift left mechanism to realize multiplication of vector and high density matrix. The whole coding process is divided into two-level pipelines. The QC-LDPC coder has the advantages of being high in the work efficiency and being high in the throughput.

Description

technical field [0001] The invention relates to the field of channel coding, in particular to a QC-LDPC coder with two-level fully parallel input cyclic left shift in a communication system. Background technique [0002] Low-Density Parity-Check (Low-Density Parity-Check, LDPC) code is one of efficient channel coding techniques, and Quasi-Cyclic LDPC (QC-LDPC) code is a special LDPC code. Both the generation matrix G and the check matrix H of the QC-LDPC code are arrays composed of circulant matrices, which have the characteristics of a segmented cycle, so they are called QC-LDPC codes. The first row of the circulant matrix is ​​the result of the cyclic right shift of the last row by 1 bit, and the remaining rows are the result of the cyclic right shift of the previous row by 1 bit. Therefore, the circulant matrix is ​​completely characterized by its first row. Usually, the first row of a circulant matrix is ​​called its generator polynomial. [0003] The communication sys...

Claims

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Application Information

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IPC IPC(8): H03M13/11
CPCH03M13/116
Inventor 张鹏
Owner RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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