A method of improving the performance of flash memory chip

Abstract

The present invention relates to the field of memory, in particular to a method for improving the performance of a flash memory chip, comprising: performing an erasing operation on each sector based on a second erasing reference current; Whether the erasing time of each sector is overtime, and record all overtimed sectors; search for the slowest erasing storage unit in the overtimed sector, and record the slowest erasing storage unit in each overtimed sector address; each address is analyzed separately to repair the memory cells corresponding to each address according to the analysis results; the above technical solution increases the standard first erasing reference current to hide deeper erasing slow The storage unit is exposed, and at the same time, false search for normal storage units can be eliminated, thereby avoiding the problem that the chip cannot be normally repaired due to too many storage units to be repaired due to this problem.

Description

technical field [0001] The invention relates to the field of memory, in particular to a method for improving the performance of a flash memory chip. Background technique [0002] A flash memory chip generally includes an array area formed by storage devices distributed in an array, each storage unit is used to store one bit of data, and the storage units in the array area are usually logically divided to form a plurality of sectors. [0003] The market is increasingly demanding the speed and performance of erase operations for flash memory products. Due to the presence of a single or a few slow-erasing memory cells in the array area, firstly, during the performance test, the erasure time of the chip or sector will exceed the specified time and cause failure; secondly, the entire sector will be invalid during the test. The erasing time is getting longer and longer. As the test progresses, the erasing time may be several times or even dozens of times that of the normal sector...

AI Technical Summary

Problems solved by technology

Due to the presence of a single or a few slow-erasing memory cells in the array area, firstly, during the performance test, the erasure time of the chip or sector will exceed the specified time and cause failure; secondly, the entire sector will be invalid during the test. The erasing time is getting longer and longer. As the test progresses, the erasing time may be several times or even dozens of times that of the normal sector, resulting in the performance of the flash memory chip failing to meet customer requirements

[0004] At present, flash memory chips search for memory cells that are slowly erased mainly through a uniform and fixed reference current or reference voltage to find problems in the form of read operations, which will cause the following problems: all memory cells that are slowly erased cannot be searched To; the normal memory unit is mistakenly searched, and too many false searches will cause too many memory cells to be repaired, resulting in the failure of the chip to be repaired normally

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