Low power consumption and crosstalk resistant coding and decoding method and coding and decoding device for network on chip

An encoding method and a network-on-chip technology, which are applied to low-power encoding and decoding methods and codecs, and the design field of ultra-large-scale integrated circuits, can solve the problem of serious crosstalk between lines without considering long interconnections, high-speed and low-power consumption Problems such as data transmission difficulties

Active Publication Date: 2017-06-13
XIDIAN UNIV
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Problems solved by technology

At present, many literatures introduce weight-based bus-invert coding (Weight-Based Bus-InvertCoding), "green" self-correcting error coding (Self-Corrected Green coding) and other coding to achieve low-power coding, but do not consider long in

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  • Low power consumption and crosstalk resistant coding and decoding method and coding and decoding device for network on chip
  • Low power consumption and crosstalk resistant coding and decoding method and coding and decoding device for network on chip
  • Low power consumption and crosstalk resistant coding and decoding method and coding and decoding device for network on chip

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Embodiment Construction

[0043] In order to make the objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be described in detail below together with the accompanying drawings.

[0044] refer to figure 1 , The low-power encoder for suppressing crosstalk of the present invention includes: a low-power coding module, a parallel-to-serial conversion module, a crosstalk suppression module, a clock frequency division module and a register module. The low-power encoding module completes low-power encoding according to the encoding mapping relationship (for details, refer to image 3 ); the serial-to-parallel conversion module uses a 4:1 ratio to perform serial conversion on parallel data; the crosstalk suppression module judges whether the worst crosstalk occurs, and inserts a mask code between the worst crosstalk data; the register module is used to temporarily store parallel serial Converted data; the clock frequency division mo...

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Abstract

The invention provides a crosstalk resistant and low power consumption coding and decoding method and a codec thereof, which can effectively reduce the dynamic power consumption of data transmission and improve the quality of the data transmission. The coding and decoding method of the invention changes the encoding mode of data by considering the reduction of the number of turns between data; compared with original data, the number of turns can be reduced by 37.56%, so that the dynamic power consumption in the data transmission is effectively reduced; and by inserting a mask code in the worst crosstalk condition, the crosstalk between data can be effectively reduced on the premise of minimizing the additional power consumption. For a random data source, the crosstalk resistant and low power consumption coding and decoding method and the codec thereof provided by the invention reduce the transmission power consumption by 37.51% while avoiding the worst crosstalk.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, relates to a network-on-chip (NoC) of a deep submicron process integrated circuit, in particular to a low-power codec method and a codec for suppressing crosstalk, which can be used for ultra-large-scale integration circuit design. Background technique [0002] Network-on-Chip (NoC) is a brand-new communication method of System-on-Chip (SoC), which is the main component of multi-core technology. Using routing and packet switching technology to replace the traditional on-chip bus to complete the communication task is a new design paradigm for VLSI in the future. With the increase of the number of integrated cores in a single chip, the long interconnection with heavy load becomes the main bottleneck of the power consumption of the network on chip. Low-power coding techniques are one of the most effective ways to reduce the dynamic power consumption of an on-chip network. [0003] Howeve...

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Application Information

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IPC IPC(8): H03M5/14G06F15/78
CPCG06F15/7825H03M5/145Y02D10/00
Inventor 徐长卿刘毅杨银堂牛玉婷
Owner XIDIAN UNIV
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