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TOA estimation circuit based on digital delay circuit

A digital delay and circuit technology, applied in the electronic field, can solve the problems of not being popularized in a large area and low precision

Inactive Publication Date: 2017-06-23
NANJING UNIV OF SCI & TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] At present, TOA (time of arrival) estimation circuits at home and abroad are generally implemented by analog circuits, and their precision is low. There are various problems in the specific implementation of digital implementation methods, and none of them have been widely popularized.

Method used

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  • TOA estimation circuit based on digital delay circuit
  • TOA estimation circuit based on digital delay circuit
  • TOA estimation circuit based on digital delay circuit

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Embodiment Construction

[0021] The present invention will be described in further detail below with reference to the accompanying drawings.

[0022] A kind of TOA estimation circuit based on digital delay circuit of the present invention, as figure 1 As shown, the circuit is composed of four modules: signal edge generation module, synchronous matching pulse generation module, time matching module and time generation module. The specific circuit diagram of the four modules is as follows: Figure 2-5 shown.

[0023] exist figure 2 In the time signal edge generation module shown, the input signal to be tested is divided into two channels, one of which enters the digital delay circuit. The delay value of the digital delay circuit can be determined by the number of cascaded basic delay units. The specific structure of the digital delay circuit See Image 6 . The other channel is directly input to the LUT unit, and the signal delayed by the digital delay circuit also enters the LUT unit; at the same ...

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Abstract

The invention discloses a TOA estimation circuit based on a digital delay circuit. The TOA estimation circuit consists of a signal edge generation module, a synchronous matching pulse generation module, a time matching module and a time generation module, wherein the signal edge generation module utilizes the digital delay circuit to output a signal edge pulse according to the rising edge of a measured signal, and inputs the signal edge pulse into the time matching module. The synchronous matching pulse module utilizes the digital delay circuit to output a series of matching narrow pulses in sequence within a time range during measurement, and outputs the matching narrow pulses to the time matching module. The time matching module processes the input signal edge pulse and the matching narrow pulses, and a time matching signal is obtained and output to the time generation module. The time generation module outputs arrival time according to the input time matching signal. The TOA estimation circuit based on the digital delay circuit accurately estimates the arrival time of a narrow pulse signal generated by the utilization of the digital delay circuit, and has high accuracy, commonality and applicability.

Description

technical field [0001] The invention belongs to the field of electronic technology, in particular to a TOA (time of arrival) estimation circuit based on a digital delay circuit. Background technique [0002] Accurately estimating the arrival time of signals has important theoretical value and application prospects in the fields of radar, communication, navigation and positioning. [0003] At present, TOA (time of arrival) estimation circuits at home and abroad are generally implemented by analog circuits, and their precision is low. There are various problems in the specific implementation of digital implementation methods, and none of them has been widely popularized. Contents of the invention [0004] The purpose of the present invention is to provide a TOA estimation circuit based on a digital delay circuit, which is a high-resolution signal arrival time estimation circuit. [0005] The technical solution for realizing the object of the present invention is: a TOA esti...

Claims

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Application Information

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IPC IPC(8): G04F10/00
Inventor 李洪涛潘琪何天豪冯欣朱熠良张昳韦梦园
Owner NANJING UNIV OF SCI & TECH
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