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Cache Power Management

A caching and leakage power technology, applied in the field of data processing, can solve the problem of high power consumption

Active Publication Date: 2021-12-21
ARM LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the cache itself has a leaky power cost to the system in which it is implemented; and in large caches, this power consumption can be significant

Method used

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Embodiment Construction

[0011] At least some embodiments provide a method of operating a cache, the method comprising the steps of: calculating cache hit bandwidth based on monitoring performance of the cache; calculating effective cache leak power based on a ratio of the currently powered portion of the cache; calculating and in-memory The effective cache leak power equivalent memory bandwidth consumed on accesses; and when the cache hit bandwidth is less than the equivalent memory bandwidth, the ratio of the currently powered portion of the cache is reduced.

[0012] Accordingly, the techniques of the present application provide an objective and useful metric from which decisions can be made regarding whether to power down a portion of the cache. Specifically, the tradeoff considered here is that between the cache hit bandwidth provided by a given proportion of the cache being active and the leak power of this proportion of the cache. In other words, to justify this proportion of the positively pow...

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Abstract

This application relates to cache power management. Provided are a method for operating a cache and a corresponding device. The cache is only partially powered, and the decision to reduce the proportion of the currently powered portion of the cache is based on computing the memory bandwidth equivalent to the current effective cache leak power consumed on memory accesses. The cache hit bandwidth is compared to this equivalent memory bandwidth, and when the cache hit bandwidth is less than the equivalent memory bandwidth, the proportion of the currently powered portion of the cache is reduced. A similar decision can also be made and based on calculating a cache hit bandwidth equivalent to an increase in cache leak power, and increasing the proportion of the currently powered portion of the cache when the cache miss bandwidth exceeds the equivalent cache hit bandwidth.

Description

technical field [0001] The present disclosure relates to the field of data processing. More specifically, the application relates to the operation of caches in data processing apparatus. Background technique [0002] Using a cache to store temporary copies of data items retrieved from memory allows the latency associated with retrieving data items from memory to be reduced, and further reduces power consumption associated with the retrieval of those data items. However, the cache itself has a leaky power cost to the system in which it is implemented; and in large caches, this power consumption can be substantial. When caching is provided in several parts (e.g., several memory banks), steps may be taken to Reduce cache leaks. Thus, the benefit of reduced leakage power due to powering down a portion of the cache is obtained. However, deciding when it is appropriate to power down a portion of the cache is not easy, and opportunities exist to improve this cache power managem...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/3225G06F1/3234G06F1/3287G06F1/3296
CPCG06F1/3225G06F1/3275Y02D10/00G11C5/144G06F1/3287G06F1/3296
Inventor 艾什利·约翰·柯若弗德安德鲁·克里斯多佛·罗斯泰茜·托马斯戴维·吉伦·范多斯
Owner ARM LTD