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A Maintenance Method of Distributed Dynamic Layer 2 Forwarding Table

A forwarding table and distributed technology, applied in digital transmission systems, data exchange networks, electrical components, etc., can solve problems such as low utilization of external memory space, low read and write speed, and limited BRAM resources

Active Publication Date: 2020-03-24
HUAXIN SAIMU CHENGDU TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a method for maintaining a distributed dynamic two-layer forwarding table, which is used to solve the problem of using a redundant way to reserve multiple entries in the external memory in the two-layer forwarding circuit in the prior art to reduce the hash mapping Conflicts, resulting in low utilization of external memory space, low read and write speed, and the use of BRAM inside the FPGA to achieve, there is a problem that BRAM is limited in FPGA internal resources

Method used

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  • A Maintenance Method of Distributed Dynamic Layer 2 Forwarding Table
  • A Maintenance Method of Distributed Dynamic Layer 2 Forwarding Table
  • A Maintenance Method of Distributed Dynamic Layer 2 Forwarding Table

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0070] combined with figure 1 Shown, a kind of maintenance method of distributed dynamic two-layer forwarding table, comprises the training of forwarding table, the query of forwarding table and the aging of forwarding table, the training of described forwarding table comprises steps:

[0071] S1) When the FPGA is powered on and started, N mutually different true random numbers R are externally input, expressed as GF(R) in the finite field, and stored in the register of the top-level control module, and the register is connected to the hash calculation module Input port, said N is the number of forwarding tables in the FPGA internal BRAM, and the entries of said forwarding tables include:

[0072] MAC: stored source address SA;

[0073] vlan: the vlan ID associated with the MAC;

[0074] port: the port number associated with the MAC;

[0075] vld: the effective flag of the entry, "1" means valid, "0" means invalid;

[0076] age: counting item, used to record the aging coun...

Embodiment 2

[0084] On the basis of Example 1, in conjunction with the attached figure 1 and image 3 As shown, the specific steps of S4) are: every other clock cycle, the hash calculation module will output a training address train_addr and a valid training address train_adr_vld, if train_adr_vld=0, do not take any action, when train_adr_vld=1, SA_vlan The port number and port will be passed in the pipeline read-write circuit, and the entry is read through the training address train_addr, and the SA_vlan corresponding to this address is compared with the entry:

[0085] A) The read table entry is not occupied, that is, the vld of the table entry=0, then the training address train_addr and the effective training address train_adr_vld are passed down as they are;

[0086] B) The table entry read has been occupied, but the content of the table entry MAC does not match the SA_vlan that needs to be trained, then the training address is valid train_adr_vld=0, and no action is taken;

[0087] ...

Embodiment 3

[0097] On the basis of Example 1, in conjunction with the attached figure 1 and Figure 4 As shown, an aging control circuit is also included, the aging control circuit is provided with an age address age_addr and an aging cycle age_period, and the working process of the aging control circuit includes:

[0098] M1): Initialize age address age_addr=0;

[0099] M2): Determine whether the age address age_addr is greater than the depth table_deep of the forwarding table, if greater, end the aging process; otherwise enter the next step;

[0100] M3): Read the age address age_addr, obtain the age count in the entry, and subtract "1" from it. If age≤1, set the effective flag vld of the entry to "0", that is, the entry in the current forwarding table The status is writable;

[0101] M4): Write the age after subtracting "1" into the age address age_addr;

[0102] M5): add 1 to the age address: age_addr=age_addr+1, return to step M2).

[0103] After the entries in the forwarding ta...

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Abstract

The invention discloses a method for maintaining a distributed dynamic two-layer forwarding table, including the training, query and aging process of the forwarding table. The training of the forwarding table includes: S1) external input of true random numbers; S2) receiving source address and Virtual local area network SA_vlan; S3) Hash the true random number and SA_vlan to calculate the address to be written; S4) The signal instruction of the entry corresponding to the address is transmitted downward; S5) If the entry to be written is set If it is invalid, the entry will not be written, otherwise, write SA_vlan into the entry in the sel circuit; S6) Hash the destination address DA_vlan and the true random number to obtain the address of the entry, and then read out the address to be queried forwarded port. Multiple small forwarding tables in the present invention adopt the same hash calculation rule, and form different hash maps with different true random numbers, so as to obtain a load rate much higher than that of a unified forwarding table, and greatly save FPGA Precious BRAM resources inside.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a method for maintaining a distributed dynamic two-layer forwarding table. Background technique [0002] Layer 2 forwarding, that is, the data link layer forwarding in the seven-layer model of network communication is generally completed in the integrated circuit chip. The common layer 2 forwarding circuit uses a memory to realize the function of the forwarding table, and uses a hash function to complete the query information and Translation of memory addresses. Hash maps are prone to collisions, where two query messages are translated to the same memory address. In order to avoid conflicts of table entry addresses, multiple table entries are generally reserved in a redundant manner at the same address, which requires the memory to prepare multiple storage spaces for the same address to reduce the impact of conflicts, which will cause storage space waste. In order ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/743H04L12/741H04L12/721H04L12/46H04L45/74
CPCH04L45/14H04L45/66H04L45/74H04L45/745H04L45/7453H04L12/4641
Inventor 邓俊杰
Owner HUAXIN SAIMU CHENGDU TECH CO LTD
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