Command-Driven Translation Prefetch for Memory Management Unit

Abstract

Methods and systems for pre-fetching address translations in a memory management unit (MMU) of a device are disclosed. In an embodiment, the MMU receives a pre-fetch command from an upstream component of the device, the pre-fetch command including an address of an instruction, pre-fetches a translation of the instruction from a translation table in a memory of the device, and stores the translation of the instruction in a translation cache associated with the MMU.

Description

technical field [0001] Embodiments of the present disclosure relate to command-driven translation prefetching for a memory management unit. Background technique [0002] A system-on-chip (SoC) device may include one or more central processors, one or more interconnects (or buses), one or more peripheral devices (or upstream devices), and one or more slave devices. Such SoC devices may further include a memory management unit (MMU) coupled to the processor and one or more system MMUs (SMMUs) coupled to one or more peripheral devices. The SMMU provides address translation services for peripheral traffic in much the same way that a processor's MMU translates addresses for processor memory accesses. [0003] The main functions of the MMU include address translation, memory protection, and attribute control. Address translation is the translation of an input address to an output address. Translation information is stored in translation tables that the MMU references to perform...

AI Technical Summary

Problems solved by technology

With limited spatial / temporal locality, predictions are often inaccurate and thus lead to poor performance of prediction schemes

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