Package-on-package device and method of forming the same
A stacked packaging and device technology, applied in the direction of semiconductor devices, electrical solid state devices, semiconductor/solid state device components, etc.
Active Publication Date: 2021-11-09
TAIWAN SEMICON MFG CO LTD
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- Abstract
- Description
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- Application Information
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Problems solved by technology
However, there are still many challenges associated with 3D integrated circuits
Method used
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[0015] The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below for the purpose of conveying the present invention in a simplified form. Of course, these are examples only and not limiting. For example, in the following description, forming a second feature over or on a first feature may include embodiments where the second feature is formed in direct contact with the first feature, and may also include embodiments where the second feature is formed in direct contact with the first feature. Embodiments where additional features may be formed between one feature such that the second feature may not be in direct contact with the first feature. In addition, the present invention may use the same device symbols and / or letters in various instances to refer to the same or similar components. The re-use of device symbols is for s...
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The invention relates to a method of providing multiple stacked packaging devices, which is beneficial to improving the joining performance of the stacked packaging. A package-on-package device includes a first package structure and a second package structure. The first packaging structure includes: a first crystal grain; and a plurality of active integrated fan-out vias and a plurality of dummy integrated fan-out vias located on a side of the first crystal grain. The second package structure includes: a plurality of active bumps bonded to the active integrated fan-out vias; and a plurality of dummy bumps bonded to the dummy integrated fan-out vias. The total number of active integrated fan-out vias and dummy integrated fan-out vias on the first side of the first die is substantially the same as the number of active integrated fan-out vias on the second side of the first die. The total number of vias and dummy integrated fan-out vias.
Description
technical field [0001] The invention relates to a stacked packaging device and a forming method thereof. Background technique [0002] In recent years, due to the increasing integration of various electronic components (such as transistors, diodes, resistors, capacitors, etc.), the semiconductor industry has grown rapidly. Much of this increase in integration is due to the continued shrinking of the minimum feature size, allowing more components to be integrated in a given area. [0003] These smaller electronic components occupy less area than previous packages, thus requiring smaller packages. Examples of types of packages for semiconductors include quad flat pack (QFP), pin grid array (PGA), ball grid array (BGA), flip chip (flip chip); FC), three-dimensional integrated circuit (three dimensional integrated circuit; 3DIC), wafer level package (waferlevel package; WLP) and package on package device (package on package device; PoP device). Some three-dimensional integrat...
Claims
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IPC IPC(8): H01L23/31H01L23/498H01L23/522H01L23/528H01L25/07
CPCH01L23/3114H01L23/3121H01L23/49816H01L23/49838H01L23/5221H01L23/528H01L25/071H01L24/19H01L24/20H01L2224/48227H01L2924/00014H01L24/48H01L2224/18H01L25/105H01L25/0657H01L2224/12105H01L2224/32225H01L24/32H01L2224/32013H01L24/92H01L2224/9222H01L2224/2919H01L2224/83104H01L2224/83102H01L24/29H01L2224/3201H01L2224/27003H01L2224/83191H01L24/83H01L24/27H01L2225/06568H01L2225/0651H01L2225/06513H01L2225/1058H01L2224/45099H01L2924/0001H01L2224/19H01L2224/83H01L2924/0665H01L2924/00012H01L23/3128H01L23/481H01L24/17H01L25/50H01L2224/02311H01L2224/0239H01L2224/13111H01L2224/13113H01L2224/13116H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/16146H01L2224/48091H01L2224/48106H01L2224/48228H01L2225/06548H01L2225/06572H01L2924/01022H01L2924/01028H01L2924/01029H01L2924/06H01L2924/07025H01L2924/15172H01L2924/15311
Inventor 曾华伟苏安治陈宪伟黄立贤杨天中
Owner TAIWAN SEMICON MFG CO LTD