Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The method comprises the steps of: providing a semiconductor substrate in which a trench comprising a first trench region, a second trench region and a third trench region that communicates the both is formed, the width of the first trench region being greater than the widths of the second trench region and the thirdtrench region; forming an insulating layer to fully fill the second trench region and the third trench region; forming a first polycrystalline silicon layer to fully fill the first trench region; removing the excess first polycrystalline silicon layer until the insulating layer is exposed; removing all the insulating layer on the surface of the semiconductor substrate and part of the insulating layer in the trench; forming a gate oxide layer, and then forming a second polycrystalline silicon layer thereon to fully fill the trench; and removing the excess second polycrystalline silicon layer until the gate oxide layer is exposed. According to the method, the polycrystalline silicon layers do not need to be processed by increasing the level of polycrystalline silicon lithography, and the surface of the product does not have obvious steps, so that subsequent photolithography and corrosion processes are less difficult.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] At present, trench VDMOS products have begun to introduce charge balance technology, and the split-gate device structure is a form that is easier to implement based on existing processes. For split gate technology, because it adopts a double gate design, and the double gate needs to be led out to different electrodes (source and gate), the deep trench gate in the middle is directly connected to the source metal by drilling holes It is connected to the source, and the shallow trench gate on the side is drawn to the periphery of the active area by increasing the polysilicon photolithography level, and then drilled to connect it. Compared with the traditional trench VDMOS, this requires additional polysilicon lithography to separate the two gates, which increases the process cost and cau...

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Problems solved by technology

Compared with the traditional trench VDMOS, this requires additional polysilicon lithography to separate the two gates, which increases the process cost and causes the l

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