Systems and methods for dynamic low latency optimization

A low-latency, user-space technology, applied in multi-program devices, program control design, instruments, etc., can solve problems such as blocking understanding, inability to return, user space low-latency technology is not optimized, etc., to achieve low-latency optimization Effect

Active Publication Date: 2021-06-01
HONG KONG APPLIED SCI & TECH RES INST
View PDF7 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Similarly, user-space low-latency techniques are not optimized for any particular application, are implemented statically, and may or may not have any significant impact on the latency experienced by the application, depending on the resources used by the application. influences
For example, improving runtime performance by using optimized compilation options (for example, using the "-O3" compilation option of the GNU compiler toolchain) is applicable during compilation, but cannot be reverted to the original option during runtime.
In addition, existing user-space low-latency techniques are not tightly coupled with existing kernel-space low-latency techniques, so instead of providing low-latency optimizations for a combination of operating systems and applications, they try to address the operating system separately and independently and the latency of one of the applications
For example, a command line to be able to start / stop system services may be available to developers, but these command line tools are usually not accessible to application developers
Also, existing user-space low-latency techniques focus on application-related tasks rather than the entire data path
In addition, existing user-space low-latency techniques do not directly access processor-based system hardware or its information, but instead interface through a hardware abstraction layer (HAL) that blocks access to the understanding of specific hardware

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Systems and methods for dynamic low latency optimization
  • Systems and methods for dynamic low latency optimization
  • Systems and methods for dynamic low latency optimization

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] figure 1 A low-latency optimized implementation of an embodiment is shown that includes a multi-part configuration for obtaining information about services and hardware used by an application and utilizing this information to provide dynamic implementation low-latency operation. specifically, figure 1 One embodiment is shown of a processor-based system 100 (eg, a smartphone or other device with limited processing and / or other capabilities) configured to optimize low-latency execution of certain applications. figure 1 The low-latency optimized implementation configuration of the illustrated embodiment includes modules implemented in user space (eg, the exemplary ANDROID framework of the illustrated embodiment) and kernel space (eg, the Linux kernel of the illustrated embodiment). Individual ones of the modules cooperate together to obtain information about the services and hardware used by the application and provide this information to facilitate low-latency operation ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The present invention provides low-latency optimized systems and methods configured to execute from the hardware layer of the entire operating system to application programs. Low-latency operation implemented according to embodiments is optimized for a specific application, which interfaces with specific hardware, executes on a host processor-based system, and is configured for low-latency optimization. For example, a low-latency optimized implementation may include various modules implemented in user space and kernel space, where these modules cooperate to obtain information about the services and hardware used by the application and provide this information for low-latency operation of the application . When running according to an embodiment, low-latency execution is dynamically enabled or disabled by a low-latency optimization implementation, on a per-application basis, when appropriate or as needed on an application.

Description

technical field [0001] The present invention relates to processor-based system operation, and more particularly to dynamic low-latency optimization for processor-based system operation. Background technique [0002] The use of various forms of processor-based platforms has exploded in recent years. For example, the use of processor-based personal communication and data processing platforms, commonly referred to as smartphones, has grown dramatically over the past few years and is expected to continue growing for the foreseeable future. For example, in addition to being used to provide cellular telephone communication services, smartphones are commonly used to provide data communication, data processing, viewing and / or creating streaming media, gaming and entertainment, and the like. Applications that can provide the aforementioned functionality range from those that use less processing power and other resources (e.g., thin clients and simple web browser applications) to tho...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/50
CPCG06F9/5038G06F9/505
Inventor 卢振聪
Owner HONG KONG APPLIED SCI & TECH RES INST
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products