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Method and apparatus for disabling high speed bus operation under high common mode voltage conditions

A high-speed bus, common-mode voltage technology, used in electrical digital data processing, digital data processing components, climate sustainability, etc.

Active Publication Date: 2018-04-06
MAXIM INTEGRATED PROD INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the automatic handshaking protocol used after a bus reset makes running at full speed problematic when both host and client are high speed compatible

Method used

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  • Method and apparatus for disabling high speed bus operation under high common mode voltage conditions
  • Method and apparatus for disabling high speed bus operation under high common mode voltage conditions
  • Method and apparatus for disabling high speed bus operation under high common mode voltage conditions

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Embodiment Construction

[0020] exist figure 1 , an apparatus 10 for disabling high-speed bus operations, set forth by way of example and not limitation, includes a handshake window enabler 12 , a common mode detector 14 and a handshake disabler 16 . The handshake window enabler 12 has a pair of differential inputs D+_IN and D−_IN and a window enable output WE. Common mode detector 14 is coupled between power input VBUS_IN and ground input GNG_IN and has a handshake inhibit output HS_Inhibit. Handshake disabler 16 is coupled to the WE output of handshake window enabler 12 , to the HS_Inhibit output of common mode detector 14 through AND gate 18 , and to the differential pair D+_IN and D−_IN.

[0021] In this non-limiting example, the handshake window enabler 12 includes a USB reset detector 20 and a one shot multivibrator (One Shot) 22 . The USB reset detector 20 has an input coupled to the D+_IN line and the D−_IN line and an output coupled to the input of the OneShot 22 . The output of One Shot 2...

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Abstract

An apparatus including a handshake window enabler having a pair of differential inputs and a window enablement output, a common mode detector coupled to a power input and a ground input and having a handshake inhibit output, and a handshake disabler coupled to the handshake window enabler, the common mode detector, and the pair of differential inputs. If a common mode voltage that out of range (excessive) is detected, high speed handshake protocols are such that the bus operates a lower data rate.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of co-pending U.S. Provisional Patent Application Serial No. 62 / 402,843, filed September 30, 2016, which is incorporated herein by reference. Background technique [0003] Universal Serial Bus (USB) is an industry-standard protocol developed in the mid-1990s that defines a bus used for connection, communication, and power supply between computers (host) and electronic devices (clients). The cables, connectors and communication protocols used. Unlike other data buses (eg, Ethernet, HDMI), USB connections are directed, with upstream and downstream ports originating from a single host. It is currently developed by the USB Implementers Forum (USB IF). [0004] The original USB 1.0 specification, introduced in January 1996, defined a data rate of 1.5 Mbit / s as "low speed" and a data rate of 12 Mbit / s as "full speed". The USB 2.0 specification was published in April 2000 and approved by t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42G06F13/40
CPCG06F13/4022G06F13/4068G06F13/4286G06F2213/0042G06F1/3287G06F1/3296
Inventor K·J·赫尔弗里赫
Owner MAXIM INTEGRATED PROD INC