Method and apparatus for disabling high speed bus operation under high common mode voltage conditions
A high-speed bus, common-mode voltage technology, used in electrical digital data processing, digital data processing components, climate sustainability, etc.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0020] exist figure 1 , an apparatus 10 for disabling high-speed bus operations, set forth by way of example and not limitation, includes a handshake window enabler 12 , a common mode detector 14 and a handshake disabler 16 . The handshake window enabler 12 has a pair of differential inputs D+_IN and D−_IN and a window enable output WE. Common mode detector 14 is coupled between power input VBUS_IN and ground input GNG_IN and has a handshake inhibit output HS_Inhibit. Handshake disabler 16 is coupled to the WE output of handshake window enabler 12 , to the HS_Inhibit output of common mode detector 14 through AND gate 18 , and to the differential pair D+_IN and D−_IN.
[0021] In this non-limiting example, the handshake window enabler 12 includes a USB reset detector 20 and a one shot multivibrator (One Shot) 22 . The USB reset detector 20 has an input coupled to the D+_IN line and the D−_IN line and an output coupled to the input of the OneShot 22 . The output of One Shot 2...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


