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Metal Interconnects for Super (Jump) Via Integration

A technology of alloys and interconnects, applied in semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of insufficient coating, affecting the resistivity of jumping vias, and reducing device performance

Active Publication Date: 2021-07-30
GLOBALFOUNDRIES U S INC MALTA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, the liner / seed is not sufficient to cover the full length of the high aspect ratio via, and the void is formed
These voids negatively affect the resistivity of jumping vias, thereby degrading device performance

Method used

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  • Metal Interconnects for Super (Jump) Via Integration
  • Metal Interconnects for Super (Jump) Via Integration
  • Metal Interconnects for Super (Jump) Via Integration

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Embodiment Construction

[0030] The present invention relates to semiconductor structures, and more particularly to metal interconnect structures and fabrication methods for super (jump) via integration. More specifically, the present invention describes a selective electroless cobalt (Co) or nickel (Ni) (or alloys thereof) process for bottom-up growth of materials such as cobalt or nickel in jump via structures. Therefore, by using a selective electroless growth process, cobalt or nickel will not form on the sidewalls of the jumping vias, thereby ensuring void filling regardless of the shape and aspect ratio of the jumping vias. In this way, it is beneficial to prevent extended voids due to pinch-off due to sidewall growth, and underside due to insufficient PVD seed coverage on high aspect ratio vias. Voiding, which in turn reduces the resistivity of jump vias and thus improves device performance. Additionally, it is helpful that the metal interconnect structures described in this paper are useful f...

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Abstract

The present invention relates to metal interconnects for super (jump) via integration, relates to semiconductor structures, and more particularly to metal interconnect structures and methods of manufacture for super (jump) via integration. The structure includes: a first wiring layer having one or more wiring structures; a second wiring layer comprising interconnects and wiring structures; and positioning one or more via interconnects and wiring structures on the second wiring layer of at least one upper wiring layer. The one or more via interconnects and wiring structures include, in part, a first metal material, and a remaining portion with conductive material over the first metal material. The jump vias pass through the second wiring layer and extend to one or more wiring structures of the first wiring layer. The jump via includes partially a metallic material, and the remainder of the jump via includes a conductive material overlying the first metallic material.

Description

technical field [0001] The present invention relates to semiconductor structures, and more particularly to metal interconnect structures and fabrication methods for super (jump) via integration. Background technique [0002] A via is an electrical connection between wiring structures (eg, wiring layers) in a physical electronic circuit, which runs through the planes of one or more adjacent layers. For example, in integrated circuit design, a via is a small opening in an insulating oxide layer that provides a conductive connection between different wiring layers. The vias connecting the lowermost metal to the diffusion or poly are generally referred to as "contacts". [0003] In the via technology, a super via (super via) is also called a skip via (skip via), which can be formed through many insulator layers, for example: one or more wiring structures in the insulator layer can be bypassed, Used to connect with the lower wiring structure. This improves the resistive proper...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/528H01L23/532H01L21/768
CPCH01L21/76877H01L23/528H01L23/53209H01L23/53223H01L23/53238H01L23/53252H01L23/53295H01L21/76816H01L23/5226H01L21/76879
Inventor 林萱张洵渊S·B·劳J·J·麦克马洪
Owner GLOBALFOUNDRIES U S INC MALTA