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Class-d amplifier

An amplifier and modulator technology, applied in amplifiers, low-frequency amplifiers, amplifier types, etc., can solve the problems of increased loss of output transistors, heat generation, etc.

Pending Publication Date: 2018-08-28
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, when designing a circuit in consideration of the maximum output power, there is a problem that the loss of the output transistor increases and there is an adverse effect of heat generation during normal use in which only a sufficiently smaller power than the maximum output power is consumed.

Method used

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no. 1 Embodiment approach

[0028] figure 1 It is a circuit diagram showing the class D amplifier of the first embodiment of the present invention. In addition, figure 2 It is a circuit diagram of a Class D amplifier showing related technology.

[0029] In this embodiment, it is possible to dynamically change the transistor size of the output transistor (switching transistor) used in the power amplification of the D-class amplifier, thereby reducing loss regardless of the input and output levels in actual use.

[0030] First, refer to Figure 2 to Figure 5 The relationship between the transistor size of the output transistor and the loss corresponding to the input level (output level) of the Class D amplifier will be described. image 3 It is a graph showing the relationship between the input audio signal and the triangular wave, the normal phase PWM output PWM+ and the reverse phase PWM output PWM-. Figure 4 It is a graph showing the relationship between transistor size and loss by taking output power on th...

no. 2 Embodiment approach

[0096] Picture 10 It is a circuit diagram showing the second embodiment of the present invention. in Picture 10 In order to simplify the drawing, it is represented by the PWM modulator 50 figure 1 The inverting circuit 11, the carrier generating circuit 12, and the two comparators 13p and 13n are shown as follows. Regarding the subsequent stage of the PWM modulator 50, only the configuration on the positive phase side is shown. In addition, the configuration on the negative side after the dead time generating circuit 14n is the same as the configuration on the positive side after the dead time generating circuit 14p, and illustration and description are omitted.

[0097] In the first embodiment, four output transistors for the high-side and low-side of the positive phase, and four output transistors for the high-side and low-side of the reverse phase, respectively, are used in parallel with two transistors. The same characteristics for both cases. In contrast, in this embodime...

no. 3 Embodiment approach

[0130] Figure 17 It is a circuit diagram showing the third embodiment of the present invention. Figure 17 In order to simplify the drawing, the driver circuit 52 represents the Picture 10 The dead time generating circuit 14p, the level shift circuit 40p, and the selectors 41pH and 41pL have the same configuration. The selectors 41pH and 41pL output PWM pulses from the OUT1 and OUT2 terminals. In contrast, the driver circuit 52 can output PWM pulses from the output terminals of the m system.

[0131] In the second embodiment, each output transistor is configured by three transistors connected in parallel, and the number of parallel connections of transistors to be driven is controlled, so that the gate width of the transistor can be changed. In contrast, in the present embodiment, each output transistor is configured by m transistors connected in parallel, and the number of parallel connected transistors to be driven is controlled, so that the transistor size can be finely contr...

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Abstract

A class-D amplifier of an embodiment includes: a PWM modulator configured to output a PWM pulse based on an input signal; a first output transistor group, in which a connection point of complementarily operated two first output transistors is an output end; a second output transistor group, in which a connection point of complementarily operated two second output transistors is connected to the connection point of the first transistors; a driver circuit capable of driving the first output transistors and the second output transistors of the first and second output transistor groups, based on the PWM pulse from the PWM modulator; and a control circuit configured to generate a control signal for operating at least one of the first output transistor group and the second output transistor group.

Description

[0001] Association application [0002] This application enjoys priority based on Japanese Patent Application No. 2017-30043 (application date: February 21, 2017). This application includes all the contents of the basic application by referring to the basic application. Technical field [0003] Embodiments of the present invention relate to class D amplifiers. Background technique [0004] In recent years, D-class amplifiers using PWM modulators have become popular as audio amplifiers for automotive use. The PWM modulator performs pulse width modulation on the sound signal by comparing the sound signal with a sawtooth wave (single-sided edge) or a triangular wave (double-sided edge) carrier wave. The PWM modulator obtains the binary switching waveform, namely the PWM pulse, as the result of pulse width modulation. The Class D amplifier performs power amplification by driving the output transistor (switching transistor) with PWM pulses from the PWM modulator. Use a low-pass filte...

Claims

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Application Information

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IPC IPC(8): H03F1/02H03F1/30H03F3/217
CPCH03F1/0205H03F1/301H03F3/2171H03F3/185H03F3/187H03F3/2173H03F3/45475H03F2200/03H03F2200/66
Inventor 清野贵文
Owner KK TOSHIBA