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Parallel timing synchronization method based on precise loop filtering

A technology of loop filtering and timing synchronization, which can be used in synchronization devices, synchronization error correction, modulation carrier systems, etc., and can solve problems such as low complexity and high error performance.

Active Publication Date: 2018-08-31
HANGZHOU DIANZI UNIV
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Problems solved by technology

[0015] The purpose of the present invention is to provide a symbol timing fast synchronization method with faster synchronization speed and better performance for the existing symbol timing synchronization method that cannot have low complexity, high bit error performance and fast synchronization at the same time. A parallel timing synchronization method based on precise loop filtering, so that it can be widely used in digital communication fields such as terrestrial wireless emergency communication, satellite and power line communication suitable for low signal-to-noise ratio transmission

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  • Parallel timing synchronization method based on precise loop filtering
  • Parallel timing synchronization method based on precise loop filtering

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Embodiment Construction

[0159] The present invention will be described in further detail below through specific embodiments and in conjunction with the accompanying drawings.

[0160] The parallel timing synchronization method based on precise loop filtering provided by the present invention can be applied to high-speed digital communication fields such as wireless and power lines, and is not limited to the fields described in detail in the following embodiments. In the following, a typical parallel timing synchronization method based on precision loop filtering is selected, and a specific implementation manner of the present invention is described in detail.

[0161] The present invention is realized through the following main steps successively: the received analog signal becomes a digital signal through analog / digital conversion after being down-converted; Design method of PN sequence in OFDM system and acquisition method of signal before detection [P]. Chinese patent: CN102065051A, 2011-05-18.") ...

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Abstract

The invention discloses a parallel timing synchronization method based on precise loop filtering. The method is executed according to the following steps: 1, a parallel processing timing synchronization interpolation step; 2, a parallel processing timing error detection step; 3, a parallel processing loop filtering step; and 4, a parallel processing interpolation control step. The scheme of the invention has the advantages of fast synchronization speed and good performance, and is widely applied to the fields of digital communication such as ground wireless emergency communication, satellitesand power line communication suitable for low signal-to-noise-ratio transmission.

Description

technical field [0001] The invention belongs to the technical field of digital communication, in particular to a parallel timing synchronization method based on precise loop filtering. Background technique [0002] In a digital communication system, since the clocks at the receiving and transmitting ends are independent of each other, the receiver cannot complete sampling at the best sampling time in each symbol period, and thus cannot directly obtain the correct symbol. To achieve correct signal transmission, it is required that the frequency and phase of the signal acquired by the receiver are the same as that transmitted by the transmitter. Therefore, the receiver needs to complete the synchronization process. Synchronization includes timing synchronization and carrier synchronization. According to the Nyquist sampling theorem, it can be known that in the digital receiver, the oversampled data after the high-speed analog-to-digital conversion of the signal, the timing s...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L7/00H04L27/26
CPCH04L7/002H04L27/2602H04L27/2662
Inventor 包建荣李阳光姜斌刘超
Owner HANGZHOU DIANZI UNIV
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