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Gate driver monolithic

A driving circuit, gate scanning technology, applied in the direction of instruments, static indicators, etc., can solve the problems of reducing circuit reliability, instability, increasing circuit complexity, etc., to avoid circuit failure and narrow the frame effect.

Active Publication Date: 2018-10-16
NANJING CEC PANDA LCD TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This instability is also related to the device itself, and there will be obvious poor functionality in the application of oxide thin film transistors
This negative drift can also lead to poor functionality of the circuit when switching scan directions
[0007] On the other hand, by adding additional forward scan control signal U2D, reverse scan control signal D2U and single-side gate scan drive circuit using two start signals GSP1 and GSP3 to realize the forward and reverse scan function reduces the reliability of the circuit , also increases the complexity of the circuit

Method used

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0096] Such as Figure 7 Shown is a circuit diagram of the first embodiment of a gate scan driving circuit. The nth-level driving circuit unit includes a positive and negative scan control module 01, a pull-up module 02, a touch auxiliary module 03, a maintenance auxiliary module 04, and a memory compensation module 05 and the first capacitor C1. Positive and negative scanning control module 01, pull-up module 02, maintenance auxiliary module 04, and memory compensation module 05 are connected to the pull-up control node netAn; positive and negative scanning control module 01, touch auxiliary module 03 and maintenance auxiliary module 04 all input constant The low level VSS is pressed; the pull-up module 02 and the touch assistant module 03 are connected to the gate scanning signal line of this level, and the gate scanning signal line outputs the gate scanning signal Gn; the first capacitor C1 is connected to the pull-up control node netAn and Between the gate scan signal lines...

Embodiment 2

[0133] Picture 9 It is a schematic circuit diagram of Embodiment 2 of a gate scan driving circuit of the present invention. The second embodiment is improved on the basis of the first embodiment, and the specific improvements are as follows:

[0134] 1. The memory compensation module 05 of the n-th drive circuit unit also includes a sixteenth thin film transistor M9B, the control terminal of the sixteenth thin film transistor M9B inputs the second clock signal CKm+4, and the two paths of the sixteenth thin film transistor M9B The terminals are respectively connected to the pull-up control node netAn and the input constant voltage low level VSS; the sixteenth thin film transistor M9B is responsible for clearing and resetting the memory compensation node netCn in time to ensure that the memory compensation node netCn can be synchronized with the pull-up control node netAn;

[0135] 2. The control end of the fourth thin film transistor M4 in the memory compensation module 05 is conne...

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Abstract

The invention discloses a gate driver monolithic. The circuit comprises N stages of driving circuit units, wherein N is a positive integer greater than 4; the n stage driving circuit unit comprises a positive and negative scanning control module, a pull-up module, a touch assisting module, a maintenance assisting module and a memory compensation module, wherein n is a positive integer greaterthan or equal to 1 and smaller than or equal to N; the memory compensation modules comprise memory compensation nodes and are used for copying voltage information of pull-up control nodes and transmitting the voltage information to the memory compensation nodes in the early touch detection stage, pulling down the voltage of the pull-up control nodes from first-stage voltage to second-stage voltagein the touch detection stage and controlling the voltage of the pull-up control nodes to be pulled up to the first-stage voltage in the later touch detection stage. In the gate driver monolithic, thepull-up control nodes of all the stages in the touch detection stage are maintained at a low potential, and stop-pit horizontal stripes caused by different characteristic shifts of thin film transistors in the pull-up modules are eliminated.

Description

Technical field [0001] The invention relates to the field of liquid crystal display, and in particular to a gate scanning driving circuit for an in-cell touch display screen. Background technique [0002] In recent years, the gate driver monolithic (GDM) in the liquid crystal display has gradually used the existing thin film transistor process to achieve integration in the liquid crystal panel, which can reduce manufacturing costs and design Reduce the size of the left and right borders. In small-size display applications, in order to meet the needs of different customer applications, the gate scan driving circuit generally needs to be able to support the function of forward scanning and reverse scanning switching. [0003] figure 1 Shown is a schematic circuit diagram of a gate scan driving circuit of an existing in-cell touch display screen. The gate scan driving circuit includes a positive and negative scan control module 01, a pull-up module 02, a touch assistant module 03, M...

Claims

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Application Information

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IPC IPC(8): G09G3/36
CPCG09G3/3674
Inventor 戴超陈旭黄洪涛王志军
Owner NANJING CEC PANDA LCD TECH