A data processing method and system
A data access and data register technology, applied in the field of communication, can solve the problem of slow vector operation process, and achieve the effect of improving the vector calculation speed
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Embodiment 1
[0058] Embodiment 1 of the present invention provides a data processing method, the flow diagram of the method can be found in figure 1 , the method includes the following steps:
[0059] Step 101, the instruction execution unit obtains a vector operation instruction, wherein the vector operation instruction includes a first instruction, a second instruction and a third instruction, and the first instruction includes a first operation code, identification information of at least two first data registers, The initial operand address and step corresponding to each first data register identification information, the second instruction includes the second opcode, the source register identification information, and at least two first data register identification information, and the third instruction includes the first Three opcodes, operation types, and number of cycles.
[0060] Wherein, the above operation type may include at least one type of vector inner product type, scalar ...
Embodiment 2
[0090] Embodiment 2 of the present invention provides a data processing system, the structural diagram of which can be found in Figure 8 , the system includes a processor 20, an instruction storage unit 21, a bus interface 22, wherein:
[0091] Processor 20, including VALU23, data registers 1, 2, 3, 4, data access unit 24, vector storage unit 25, external register 26, internal register 27, instruction execution unit 28, instruction decoding unit 29, program counter 30 ;
[0092] VALU23 is respectively connected to data registers 1, 2, 3, 4, external registers 26, and instruction execution unit 28;
[0093] Data registers 1, 2, 3, 4 are respectively connected to the data access unit 24;
[0094] Data access unit 24 is connected with external register 26 and vector storage unit 25 respectively;
[0095] The vector storage unit 25 is connected with the bus interface 22;
[0096] The external register 26 is connected with the instruction execution unit 28 and the internal reg...
Embodiment 3
[0106] Embodiment 3 of the present invention provides another data processing system, the structural diagram of which can be found in Figure 9 , the system consists of:
[0107] An instruction execution unit 301, configured to obtain a vector operation instruction, wherein the vector operation instruction includes a first instruction, a second instruction, and a third instruction, and the first instruction includes a first operation code, at least two first data Register identification information, initial operand address and step corresponding to each first data register identification information, the second instruction includes a second operation code, source register identification information, and the at least two first data register identification information Information, the third instruction includes a third operation code, operation type, and number of cycles;
[0108] The instruction execution unit 301 is further configured to write the vector operation instruction...
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