Power management chip and forming method thereof

Abstract

The invention provides a power management chip and a forming method thereof. The power management chip comprises a low-voltage logic control circuit located on a semiconductor substrate; A high-voltage JFET is fabricated on the semiconductor substrate by a low-voltage process. The high-voltage JFET comprises a deep N-well region located on the semiconductor substrate; An internal P-well region located in the deep N-well region, an upper surface of the internal P-well region being flush with an upper surface of the deep N-well region, and a bottom surface and a side surface of the internal P-well region being surrounded by the deep N-well region; The inner P-well region has a gate heavily doped region, the deep N-well region has a source heavily doped region and a drain heavily doped region, and the gate heavily doped region is located between the source heavily doped region and the drain heavily doped region; The cross-sectional distance from the internal P-well region to the drain heavily doped region is 20 [mu]m to 30[mu]m. The power management chip can be manufactured by a low-voltage process, thereby reducing the cost, shortening the design period and ensuring the process yield.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a power management chip and a forming method thereof. Background technique [0002] Power management chips usually include AC-DC or DC-DC, among which, it is especially common to switch from high voltage to low voltage, such as power adapters, mobile phone chargers, car headlights and other applications. Mains power or high-voltage power input, the high-voltage is converted to low-voltage through the power management chip, and it is used as power supply for subsequent applications. [0003] Existing power management chips are generally composed of two chips, one chip is composed of a high-voltage device (such as MOS or JFET), and the other chip is a low-voltage logic control module chip. The high-voltage device in the chip carries the input protection to avoid the function of burning the logic control chip due to the high voltage when the mains or high voltage is input. [...

AI Technical Summary

Problems solved by technology

[0005] Although the power management chip also has a structure composed of a single chip, for example, it is made by ultra-high voltage BCD technology (so as to realize the integration of high-voltage devices and low-voltage logic modules on a single chip), but such a chip structure leads to special processes and high costs. , and the process is complex, all device parameters are customized, need to be redesigned separately to use, and the cycle is long

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