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Display substrate, driving method thereof and display device

A technology for displaying substrates and clock signals, applied to static indicators, instruments, etc., can solve the problems of limiting the frame size of the display panel, the display panel frame cannot be reduced, and the size of the steps is large, so as to achieve small frames, reduce the number, and reduce wiring Effect

Inactive Publication Date: 2019-02-26
XIAMEN TIANMA MICRO ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, the number of gate lines is consistent with the output channel of the gate driver IC. More output channels lead to a correspondingly larger number of lines, which makes the step size on the COG (Chip on Glass) side larger, which in turn makes the display panel The border cannot be reduced, especially for high-resolution display devices, the number of traces is further increased, which further limits the border size of the display panel

Method used

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  • Display substrate, driving method thereof and display device
  • Display substrate, driving method thereof and display device
  • Display substrate, driving method thereof and display device

Examples

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Embodiment 1

[0054] See Figure 5 , Figure 5 is a schematic circuit diagram of a display substrate when N is 2, wherein, Figure 5 In the figure, three control modules are taken as an example, but it should be known that in practical applications, the display substrate may also include more control modules, and the number of control modules is not limited in this embodiment of the present invention.

[0055] Specifically, the display substrate includes a reference signal line VGL and a clock signal line group CK. Wherein, the clock signal line group CK may include a first clock signal line, a second clock signal line, a third clock signal line and a fourth clock signal line, and the first clock signal line and the second clock signal line may form a pair of clock signal lines line, the third clock signal line and the fourth clock signal line may form a pair of clock signal lines. Wherein, each clock signal line is connected with a clock signal generator VCK, that is, the first clock si...

Embodiment 2

[0078] See Figure 8 , Figure 8 is a schematic circuit diagram of a display substrate when N is 3, wherein, Figure 8 In the figure, two control modules are taken as an example, but it should be known that in practical applications, the display substrate may also include more control modules, and the number of control modules is not limited in this embodiment of the present invention.

[0079] Specifically, the display substrate includes a reference signal line VGL and a clock signal line group CK. Wherein, the clock signal line group CK may include a first clock signal line, a second clock signal line, a third clock signal line, a fourth clock signal line, a fifth clock signal line and a sixth clock signal line, the first clock signal line and The second clock signal line can form a pair of clock signal lines, the third clock signal line and the fourth clock signal line can form a pair of clock signal lines, and the fifth clock signal line and the sixth clock signal line c...

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Abstract

The invention discloses a display substrate, a driving method thereof and a display device, which belong to the technical field of display and are used for reducing the number of output channels of agate driving IC and reducing the frame of a display panel. The display substrate includes: a gate control circuit and a plurality of gate lines. The adjacent N gate lines among the plurality of gate lines are taken as a gate line group, and the gate control circuit has control modules in one-to-one correspondence with the respective gate line groups, where N is a positive integer greater than or equal to 2. Each of the control modules includes a signal input end and N signal output ends, the signal input end is configured to receive a gate drive signal at the signal output end corresponding tothe gate drive integrated circuit, and the signal output ends are sequentially connected to the N gate lines. Each of the control modules is configured to divide the received gate drive signal into Nequal divisions in the time domain and sequentially output the same to the N gate lines connected to the control module.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a display substrate, a driving method thereof, and a display device. Background technique [0002] Currently, in a display device, a pixel unit of a display panel is formed with a thin film transistor (Thin Film Transistor, TFT), and the TFT can drive the pixel unit to realize image display. Generally speaking, each pixel unit is driven to realize image display by scanning each row of gate lines in the display panel and applying a data voltage signal to the corresponding pixel unit through the data line. [0003] However, the current display panel is generally driven by a gate driver on array (Gate Driver on Array, GOA) technology or an external gate driver integrated circuit (Integrated Circuit, IC) technology. Among them, the GOA technology directly fabricates the gate drive circuit on the array substrate. Therefore, the frame of the display panel based on the GOA technology ...

Claims

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Application Information

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IPC IPC(8): G09G3/20
CPCG09G3/20
Inventor 丁宗财欧文静刁庚秀李峻
Owner XIAMEN TIANMA MICRO ELECTRONICS