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Programmable computing array

A technology for computing arrays and arrays, applied in the field of programmable gate arrays, can solve problems such as limiting the application of programmable gate arrays

Inactive Publication Date: 2019-04-30
厦门海存艾匹科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Obviously, solidifying computing units will limit the further application of programmable gate arrays

Method used

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Embodiment Construction

[0022] figure 1 is a cross-sectional view of a three-dimensional writable memory (3D-W). 3D-W is a kind of three-dimensional memory (3D-M), and the stored information is entered by electrical programming. According to the number of times it can be programmed, 3D-W is divided into three-dimensional one-time programming memory (3D-OTP) and three-dimensional multiple programming memory (3D-MTP). Among them, 3D-OTP can be programmed once, and 3D-MTP can be programmed repeatedly. Common 3D-W includes 3D-XPoint (three-dimensional cross-point array memory), 3D-RRAM (three-dimensional impedance memory), 3-Dmemristor (three-dimensional resister), 3D-OTP (three-dimensional one-time programming memory), etc.

[0023] The 3D-W 10 includes a substrate circuit layer OK formed on a substrate 0 . The storage layer 16A is stacked on the substrate circuit OK, and the storage layer 16B is stacked on the storage layer 16A. The substrate circuit layer OK contains the peripheral circuitry of th...

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Abstract

The invention provides a programmable computing array based on a three-dimensional writable memory (3D-W). The device comprises a programmable computing unit array, a programmable logic unit array anda plurality of programmable connections. Each programmable computing unit contains at least one 3D-W array, the 3D-W array stores a lookup table (LUT) of a mathematical function.

Description

technical field [0001] The present invention relates to the field of integrated circuits, and more specifically, to programmable gate arrays. Background technique [0002] Programmable gate array is a semi-custom integrated circuit, which realizes customization of logic circuits through back-end process or on-site programming. US Patent 4,870,302 discloses a programmable gate array. It contains multiple programmable logic elements (configurable logic element, or configurable logic block) and programmable connections (configurable interconnect, or programmable interconnect). Among them, the programmable logic unit can selectively realize shift, logic not, AND (logic and), OR (logic and), NOR (and not), NAND (and not), XOR (exclusive or) under the control of the setting signal. ), + (arithmetic addition), - (arithmetic subtraction) and other functions; the programmable connection can selectively realize functions such as connection and disconnection between two interconnecti...

Claims

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Application Information

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IPC IPC(8): G06F1/03
CPCG06F1/03G06F1/0307
Inventor 张国飙
Owner 厦门海存艾匹科技有限公司