A programmable gate array package containing a programmable computing unit

Abstract

The invention provides a programmable gate array package. The programmable gate array package comprises at least one programmable computing chip and a programmable logic chip. The programmable computing chip comprises a plurality of programmable computing units, each programmable computing unit comprises a writable storage array, and a lookup table (LUT) of a basic function is stored in each writable storage array. The programmable computing chip and the programmable logic chip are vertically stacked and are electrically coupled through inter-chip connection.

Description

technical field [0001] The present invention relates to the field of integrated circuits, and more specifically, to programmable gate arrays. Background technique [0002] Programmable gate array is a semi-custom integrated circuit, which realizes customization of logic circuits through back-end process or on-site programming. US Patent 4,870,302 discloses a programmable gate array. It contains multiple programmable logic elements (configurable logic element, or configurable logic block) and programmable connections (configurable interconnect, or programmable interconnect). Among them, the programmable logic unit can selectively realize shift, logic not, AND (logic and), OR (logic and), NOR (and not), NAND (and not), XOR (exclusive or) under the control of the setting signal. ), + (arithmetic addition), - (arithmetic subtraction) and other functions; the programmable connection can selectively realize functions such as connection and disconnection between two interconnecti...

AI Technical Summary

Problems solved by technology

Obviously, solidifying computing units will limit the further application of programmable gate arrays

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