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Frequency divider and chip thereof

A frequency divider and frequency division ratio technology, applied in the field of frequency division technology, can solve the problems of unchangeable, non-adjustable phase, limited output frequency range, etc., to achieve the effect of eliminating burrs, large frequency division range, and wide phase adjustment range.

Active Publication Date: 2019-07-12
SHANGHAI ANLOGIC INFOTECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The frequency division ratio of commonly used frequency dividers can only be certain specific values, resulting in a limited output frequency range, and the duty cycle of the output frequency is usually fixed and cannot be changed, and the output phase is also non-adjustable

Method used

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  • Frequency divider and chip thereof
  • Frequency divider and chip thereof
  • Frequency divider and chip thereof

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Embodiment Construction

[0034] In the following description, many technical details are proposed in order to enable readers to better understand the application. However, those skilled in the art can understand that the technical solutions claimed in this application can be realized even without these technical details and various changes and modifications based on the following implementation modes. In order to make the purpose, technical solution and advantages of the present application clearer, the implementation manner of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0035]The first embodiment of the present application relates to a frequency divider, which is used to receive an input first clock signal to generate and output a second clock signal, the frequency division ratio and duty cycle of the second clock signal are continuously adjustable and The phase is continuously adjustable within a preset range, which is The prec...

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Abstract

The invention relates to the field of integrated circuits, and discloses a frequency divider and a chip thereof. The frequency divider comprises a multiplexer, a coefficient adjusting module, a programmable counter, a judgment module, a first signal generator, a second signal generator and an output control module, the frequency divider generates and outputs a second clock signal according to an input first clock signal, the frequency division ratio and the duty ratio of the second clock signal are continuously adjustable at will, and the phase of the second clock signal is continuously adjustable within a preset range. According to the embodiment of the invention, the frequency divider with an arbitrary frequency division ratio, an arbitrary duty ratio and a maximum phase adjustment rangeand without burrs in output is realized, and the application of the FPGA clock in various scenes is met.

Description

technical field [0001] The present application relates to the field of integrated circuits, in particular to a frequency division technology. Background technique [0002] In FPGA chip applications, multiple clock outputs are usually required, and the frequency, phase, and duty cycle of each clock must be changed according to different applications. The frequency divider is often used in the design of the clock output of the FPGA chip, and the output frequency is changed by changing the value of the frequency division ratio. The frequency division ratio of commonly used frequency dividers can only be certain specific values, resulting in a limited output frequency range, and the duty cycle of the output frequency is usually fixed and cannot be changed, and the output phase is also non-adjustable. FPGA often uses two clock outputs with a certain phase relationship, and the phase relationship can be changed according to different requirements. Based on the above situation, i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K23/66
CPCH03K23/66
Inventor 宋孝立
Owner SHANGHAI ANLOGIC INFOTECH CO LTD
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