Systems and methods for managing dynamic random access memory (DRAM)

Abstract

There is provided an apparatus for managing dynamic random access memory (DRAM), the apparatus comprising a processor configured to map each cluster of a plurality of clusters of banks of the DRAM, toeach application of a plurality of applications executing on a common 5 virtual machine (VM) running on a host operating system (OS) of a host computing device, wherein each cluster of banks is usedexclusively by each mapped application.

Description

Background technique [0001] Some embodiments of the present invention relate to dynamic random access memory (DRAM for short), more specifically but not limited to, a method and system for managing DRAM. [0002] In modern memory systems, access to DRAM is controlled by a memory controller. DRAM is divided into a hierarchy including channels, banks, ranks, rows, and columns in order to increase throughput and performance. The memory controller uses a specified subset of bits of the physical address to select a channel, rank, bank, row, and column. The storage algorithm used in the storage controller is usually configured by the system firmware, so the process of changing it is cumbersome. The hardware capabilities of the storage controller also place constraints on the possible implementation options. Contents of the invention [0003] The object of the present invention is to provide a device, a method, a computer program product and a system for managing dynamic random ...

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Problems solved by technology

The storage algorithm used in the storage controller is usually configured by the system firmware, so the changing proces

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