Resistive memory device including reference cell

Abstract

The present invention provides a resistive memory device. The resistive memory device includes a plurality of word lines, a plurality of reference cells, a plurality of first resistive memory cells, aplurality of second resistive memory cells maintained in an off state, a read circuit configured to provide a first read current to the first resistive memory cells and provide a second read currentto the reference cells while one of the first resistive memory cells is selected to perform a read operation, and a compensation circuit configured to provide a compensation current based on a first leakage current from the off resistive memory cells to the reference cells to compensate for a second leakage current generated by the unselected first resistive memory cells. Each reference cell is connected to one of the word lines and each of the first resistive memory cells are connected to one of the word lines.

Description

[0001] This application requires the Korean Patent Application No. 10-2018-0053928 filed at the Korean Intellectual Property Office on May 10, 2018 and the U.S. Patent Application No. 16 / 130,358 filed at the U.S. Patent and Trademark Office on September 13, 2018. Rights and priority, the disclosure of the above-mentioned patent application is fully incorporated herein by reference. Technical field [0002] The inventive concept relates to a resistive memory device, and more specifically, to a resistive memory device including a reference cell and a method of operating the resistive memory device. Background technique [0003] Resistive memory devices store data in memory cells including variable resistance elements. A read current can be supplied to the memory cell to read data stored in the memory cell of the resistive memory device. For example, the read voltage can be detected due to the read current and the variable resistance element of the memory cell. Since the resistive ...

AI Technical Summary

Problems solved by technology

Since resistive memory devices use read current to sense data stored in memory cells, leakage current caused by process-voltage-temperature (PVT) variations can degrade the reliability of read operations

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