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Parallel computing result filtering method and system

A technology of parallel computing and filtering method, which is applied in computing, program control design, generating/distributing signals, etc., and can solve problems such as computing errors, inability to meet the timing requirements of parallel computing, and long serial computing circuits.

Active Publication Date: 2019-11-29
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Problems solved by technology

[0004] The present invention provides a filtering method and system for parallel calculation results, which can solve the problem that in the prior art, due to the relatively long serial calculation circuit, it takes more time to confirm fvp than one time period of parallel calculation, which leads to calculation errors and cannot satisfy parallel calculation. timing requirements

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  • Parallel computing result filtering method and system
  • Parallel computing result filtering method and system
  • Parallel computing result filtering method and system

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Embodiment Construction

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0036] It can be seen from the background technology that since the calculation result of each path needs to be calculated based on the calculation result of the previous path, if the advanced calculation is performed directly, the parallel computing result will be inaccurate. There are two main methods for filtering the existing parallel computing results. , one is to confirm the first valid position (first valid position, fvp) of each output in turn according...

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Abstract

The invention discloses a parallel computing result filtering method and a system. The method comprises the steps of generating an input value of a first effective position fvp of each fragment at thesame time; calculating to obtain an output result corresponding to the input value of each first effective position fvp according to the input value of the first effective position fvp correspondingto each fragment; and according to the output result of the first effective position fvp of the first fragment, sequentially selecting the output results of the second to S fragments, filtering the parallel computing result, and finally obtaining a correct parallel computing result. According to the method, a parallel filtering mode is adopted, original serial filtering calculation is changed intoparallel calculation of S fragments, the calculation time is only 1 / S of the original calculation time, the calculation efficiency is improved, and meanwhile the time sequence requirement of parallelcalculation can be met.

Description

technical field [0001] The invention relates to the technical field of digital circuits, in particular to a filtering method and system for parallel computing results. Background technique [0002] At present, in the design and development process of digital circuits such as Application Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA), most of them adopt parallel computing design. Perform multi-way calculations in parallel to improve computing performance and efficiency. However, when there is a strong data dependency between multi-path parallel computing, for example, there is a serial relationship in time between multi-path computing, which will affect the efficiency of parallel computing. Computational efficiency. [0003] Since the calculation results of each path need to be calculated based on the calculation results of the previous path, if the calculation is performed directly ahead of time, the parallel comp...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F1/08G06F9/3851G06F17/00
Inventor 史宏志刘海威赵健
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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