Polygon adaptive simplification processing method and device for integrated circuit layout

An integrated circuit and polygon technology, which is applied in electrical digital data processing, special data processing applications, instruments, etc., can solve the problem that the accuracy, integrity and efficiency of the extrapolation method cannot be guaranteed, which affects the accuracy of the adaptive simplified processing method. , complete and efficient, missing polygons, etc.

Active Publication Date: 2020-01-10
北京智芯仿真科技有限公司
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Problems solved by technology

[0004] However, the inventor found in the process of implementing the present invention that, in the process of simplifying the multiple polygons of the layout of the integrated circuit in the existing technology for analyzing the DC electric field of the integrated circuit, if it is necessary to identify all Due to the huge amount of operations, it is easy to repea

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  • Polygon adaptive simplification processing method and device for integrated circuit layout
  • Polygon adaptive simplification processing method and device for integrated circuit layout
  • Polygon adaptive simplification processing method and device for integrated circuit layout

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Embodiment Construction

[0053] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be described in detail below through implementation with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the implementation of the present invention example, not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0054] In the description of the present invention, unless otherwise specified, "plurality" means two or more. In the description of the present invention, "first", "second" and so on are only used to distinguish each other, rather than to represent their importance and order.

[0055] Please refer to Figure 1-Figure 8 , the embodiment of the present application provide...

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Abstract

The embodiment of the invention discloses a polygon adaptive simplification processing method and device for an integrated circuit layout. The method comprises the following steps of obtaining a plurality of polygons of the integrated circuit layout containing a plurality of vertexes, and forming a Delaunay triangular grid taking the vertexes of the polygons as the grid nodes; aligning the Delaunay triangular grid to each edge of the plurality of polygons according to an edge exchange method to form a first triangular grid; identifying all triangles in the plurality of polygons in the first triangular grid according to an extrapolation method, wherein the extrapolation method forms all polygons into a set; taking out the polygons from the set one by one, identifying the triangles, repeating the operation until the set is an empty set, and then ending the identification; and judging whether the edges of the plurality of polygons in the first triangular grid meet a preset rule, and performing the adaptive simplification processing on the plurality of polygons according to the quality of each triangle when the preset rule is met. According to the invention, the accuracy, completenessand high efficiency of the polygon adaptive simplification processing method for the integrated circuit layout can be ensured.

Description

technical field [0001] The invention relates to the field of simplified processing of integrated circuit layout polygons, in particular to a method and device for adaptive simplified processing of integrated circuit layout polygons. Background technique [0002] The layout of the integrated circuit is the intermediate link between the schematic diagram of the integrated circuit and the realization of the integrated circuit process, and it is an indispensable and important link. Through integrated circuit layout design, the three-dimensional circuit system can be transformed into a two-dimensional plane figure, and then restored to a three-dimensional structure based on silicon materials after processing. [0003] When analyzing the DC electric field of integrated circuits, the first thing to face is the problem of meshing multiple polygons in the complex layout of integrated circuits. Since complex integrated circuit layout multiple polygons in engineering are usually descr...

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Application Information

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IPC IPC(8): G06F30/392
Inventor 唐章宏
Owner 北京智芯仿真科技有限公司
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