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Semiconductor memory device, semiconductor memory module, and method of accessing nonvolatile memory

A storage device and storage body technology, applied in the direction of information storage, static memory, digital storage information, etc., can solve problems such as storage unit disturbance

Pending Publication Date: 2020-02-28
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In other words, other adjacent memory cells may be disturbed

Method used

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  • Semiconductor memory device, semiconductor memory module, and method of accessing nonvolatile memory
  • Semiconductor memory device, semiconductor memory module, and method of accessing nonvolatile memory
  • Semiconductor memory device, semiconductor memory module, and method of accessing nonvolatile memory

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Embodiment Construction

[0025] Example embodiments of the present disclosure will now be described more fully with reference to the accompanying drawings, in which example embodiments are shown.

[0026] figure 1 is a block diagram illustrating a semiconductor memory device 100 according to an example embodiment of the present disclosure. refer to figure 1 , the semiconductor storage device 100 may include a bank array 110, a data buffer 120, an address buffer 130, a command buffer 140, a control logic block 150, a first demultiplexer 160, a second demultiplexer 170, and a sensor 180 .

[0027] The bank array 110 may include first to eighth memory banks 111-118. The first to eighth memory banks 111-118 may include memory units for storing data (for example, see figure 2 ). The first to eighth memory banks 111-118 may be configured to independently perform a set operation, a reset operation, or a read operation. Bank array 110 is illustrated with eight banks, but the present disclosure is not l...

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Abstract

A semiconductor memory device may include banks. A sensor is disposed adjacent to the banks and configured to sense a temperature. An address buffer is configured to receive an address from an external device. A first demultiplexer is configured to transfer a row address in the address to one of the banks. A second demultiplexer is configured to transfer a column address in the address to one of the banks. A command buffer is configured to receive a command from the external device. A control logic block is configured to control the first and second demultiplexers and the banks in accordance with the command and bank information in the address. A data buffer is configured to exchange data signals between the banks and the external device. The control logic block may be further configured to transfer information on the temperature to the external device.

Description

[0001] Cross References to Related Applications [0002] This patent application claims priority from Korean Patent Application No. 10-2018-0097448 filed on August 21, 2018, the entire contents of which are hereby incorporated by reference in their entirety. Background technique [0003] The present disclosure relates to a semiconductor circuit, and in particular, to a semiconductor memory device configured to manage a heating process thereof, a semiconductor memory module including the semiconductor memory device, and a method of accessing a nonvolatile memory. [0004] Semiconductor memory includes at least one nonvolatile memory, such as phase change memory, ferroelectric memory, magnetic memory, resistive memory, and FLASH memory. Specifically, the phase change memory, which is one of the nonvolatile memories, is configured to change the resistance value of the memory cell by heating the memory cell. In other words, when a set or reset operation is performed on the phase ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C13/00
CPCG11C13/0023G11C13/004G11C13/0069G11C13/0026G11C13/0028G11C13/003G11C2213/79G11C13/0004G11C13/0097G11C13/0033G11C7/04G11C5/04G11C8/12
Inventor 郑志完A.卡瓦拉李泰成任政炖
Owner SAMSUNG ELECTRONICS CO LTD
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