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Asynchronous step-down dcdc chip and bootstrap circuit based on asynchronous step-down dcdc chip

A bootstrap circuit and chip technology, applied in electrical components, adjusting electrical variables, output power conversion devices, etc., can solve problems such as the inability of the bootstrap capacitor to be charged, and achieve the effect of solving the inability to charge

Active Publication Date: 2021-03-23
3PEAK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] The purpose of the present invention is to provide an asynchronous step-down DCDC chip and a bootstrap circuit based on the asynchronous step-down DCDC chip to solve the problem that the bootstrap capacitor cannot be charged under light load conditions

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  • Asynchronous step-down dcdc chip and bootstrap circuit based on asynchronous step-down dcdc chip
  • Asynchronous step-down dcdc chip and bootstrap circuit based on asynchronous step-down dcdc chip
  • Asynchronous step-down dcdc chip and bootstrap circuit based on asynchronous step-down dcdc chip

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Embodiment Construction

[0045] The present invention will be described in detail below in conjunction with various embodiments shown in the drawings. However, these embodiments do not limit the present invention, and structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0046] The invention discloses an asynchronous step-down DCDC chip, which comprises an input terminal, a first output terminal and a second output terminal, the input terminal is connected to the input voltage, and the voltage difference between the first output terminal and the second output terminal is V BOOT ,in:

[0047] A plurality of first MOS transistors are provided between the input end and the first output end;

[0048] A BOOT reference voltage unit is provided between the gate of the first MOS transistor and the second output terminal;

[0049] A second MOS transistor is provided between the second output t...

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Abstract

The invention discloses an asynchronous voltage reduction DCDC chip and a bootstrap circuit based on the asynchronous voltage reduction DCDC chip. The DCDC chip comprises an input end, a first outputend and a second output end. The input end is connected with an input voltage, the voltage difference between the first output end and the second output end is VBOOT, and a plurality of first MOS tubes are arranged between the input end and the first output end. A BOOT reference voltage unit is arranged between the grid electrode of the first MOS tube and the second output end. A second MOS transistor is arranged between the second output end and the reference potential, and the second MOS transistor is driven by the logic control unit. The bootstrap circuit comprises an asynchronous voltage reduction DCDC chip; a bootstrap capacitor; an inductor; an output capacitor and a load resistor. By connecting the lower end of the BOOT reference voltage unit to the second output end SW, the problemthat a bootstrap capacitor CBOOT cannot be charged under the light load condition is solved.

Description

technical field [0001] The invention belongs to the technical field of power supply management chips, and in particular relates to an asynchronous step-down DCDC chip and a bootstrap circuit based on the asynchronous step-down DCDC chip. Background technique [0002] ginseng figure 1 Shown is a bootstrap circuit based on an asynchronous step-down DCDC chip in the prior art, where the specific circuit of the BOOT reference voltage unit is as follows figure 2 As shown, the asynchronous step-down step-down DCDC chip needs to use the Schottky diode D0 to form the freewheeling path of the inductor current to complete the input voltage V IN to the output voltage V OUT conversion. [0003] Asynchronous step-down DCDC chips usually use NMOS tubes as high-side power tubes. In order to drive high-side NMOS tubes, it is necessary to design a BOOT drive circuit inside the chip, with an external bootstrap capacitor C BOOT , to generate the power BOOT of the high-side NMOS transistor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M3/158
CPCH02M3/158
Inventor 冯翰雪皮文兵
Owner 3PEAK INC
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