Layout graph accurate matching inspection method

A technology of precise matching and inspection methods, applied in image enhancement, image analysis, image data processing and other directions, can solve the problems of inconsistent matching, inability to do it, limited standard library, etc., and achieve the effect of reducing computing time

Pending Publication Date: 2020-10-09
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

When the repeated subunits in the layout overlap with x as the step size, if x is greater than a certain value, the adjacent matching unit graphics enter the bounding box of the matching unit and become the additional graphics of the matching unit. This is the matching However, the industry needs to detect such graphics with inconsistent matching degrees, and the me

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  • Layout graph accurate matching inspection method

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Embodiment Construction

[0032] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. The advantages and features of the present invention will be more apparent from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0033] Hereinafter, the terms "first", "second", etc. are used to distinguish between similar elements, and are not necessarily used to describe a specific order or chronological order. It is to be understood that these terms so used are interchangeable under appropriate circumstances. Similarly, if a method described herein includes a series of steps, the order in which these steps are presented is not necessarily the only order in which these steps can be performed, and some described steps may be omitted and / or...

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Abstract

The invention provides a layout graph accurate matching inspection method, which comprises the following steps: reading a standard layout design, and finding out a reference graph; generating a bounding box for the reference graph; adding a mark graph to the reference graph according to the size and the position of the boundary frame; taking the reference graph, the boundary frame and the mark graph as reference units for matching calculation of a layout graph to be measured; checking the matching of the layout to be measured by using the reference units, and detecting whether the boundary frames of the adjacent reference units are overlapped or not when the reference pattern is overlapped with the to-be-detected layout pattern to be measured; if the boundary frames are overlapped, combining the overlapped adjacent boundary frames; and calculating the number of the mark graphs in the bounding frame, and if the number of the mark graphs in one bounding frame is greater than 1, judging that the layout graph corresponding to the bounding frame has an overlapping region. According to the method, the situation that the layout graphs are overlapped is checked, the risk that the overlapped graphs are mistakenly regarded as standard graphs in the checking process of the layout graph matching degree can be avoided, and the calculation time is shortened.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an inspection method for precise matching of layout patterns. Background technique [0002] There are some highly repetitive graphics in the advanced technology chip design layout, such as the storage area of ​​the logic chip and the pixel area of ​​the camera chip. The slight difference in the size of the original design pattern will have a huge impact on the optical proximity correction. For these repeating units, pattern matching is commonly used in the industry to detect these repeating units to ensure that they are consistent in the original design pattern size. [0003] The basic principle of pattern matching check is to use a minimum repeating subunit as the reference pattern to compare with the pattern in the original layout. When the reference pattern and the pattern in the layout completely match in size and relative position, the matching degree is considered to...

Claims

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Application Information

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IPC IPC(8): G06T7/00
CPCG06T7/001G06T7/0006G06T2207/30148
Inventor 叶勇张辰明陈翰
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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