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Data reading circuit and storage unit

A technology of data reading and reading unit, which is applied in the field of integrated circuits, can solve the problems of small data reading and reading margin, and achieve the effect of improving the reading margin

Active Publication Date: 2020-11-10
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The embodiment of the present invention solves the technical problem of small read margin in the process of data reading

Method used

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  • Data reading circuit and storage unit
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Embodiment Construction

[0024] In the prior art, excessive current may rewrite the data stored in the MRAM, resulting in read disturbance (Read Disturb). Therefore, the requirement on the voltage bias of the bit line of the MRAM cell is relatively high, and when the read voltage of the bit line is small, the read current is also small, which will result in a large read error.

[0025] refer to figure 1 , a circuit structure diagram of an existing data reading circuit is given.

[0026] The existing data reading circuit includes a read unit and a latch voltage comparator. Depend on figure 1 It can be seen that the voltage comparison point V comp Connect directly to the bit line BL of the cell being read. at the voltage comparison point V comp with reference voltage V ref When the input latch voltage comparator is used for comparison, the bit line BL voltage is affected by the current of the cell being read (VDD is the power supply voltage), which in turn causes the voltage comparison point V co...

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Abstract

The invention discloses a data reading circuit and a storage unit. The data reading circuit comprises a read unit, a voltage stabilizing unit, a first amplifying unit, a reference unit, a second amplifying unit and a comparison unit, the voltage stabilizing unit is used for stabilizing and outputting the current of the read unit to the first amplifying unit; the first amplification unit is used for amplifying and outputting the current of the read unit to the comparison unit; the second amplification unit is used for amplifying and outputting the reference current to the comparison unit; and the comparison unit is used for comparing the comparison point voltage with a reference voltage according to the amplified current of the read unit and the amplified comparison point voltage corresponding to the reference current, and outputting a comparison result. By adopting the scheme, the reading allowance of data reading can be improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, in particular to a data reading circuit and a storage unit. Background technique [0002] Today, Magnetic Random Access Memory (MRAM) has immeasurably broad prospects. Among them, Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is the representative, which has the characteristics of high read and write speed, high density, low power consumption, long data storage time and long life. Since MRAM has resistance variability, data information can be stored through its different resistance states. At the same time, limited by the existing technology, the ratio of the resistance values ​​of the high resistance and low resistance states of each cell (Cell) in MRAM is relatively low, resulting in a relatively small window for the readout circuit to distinguish the two states, that is, the read margin The amount is small. [0003] In order to judge the state of the MRAM, a volt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26
CPCG11C16/26G11C11/1673G11C11/1655G11C27/024G11C13/004G11C2013/0054G11C13/0026G11C11/1697G11C11/1675
Inventor 汪腾野彭家旭王韬赵子鉴
Owner SEMICON MFG INT (SHANGHAI) CORP
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