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A pattern file compiling method, device and electronic equipment

A compilation method and file technology, applied in the direction of code compilation, program code conversion, etc., can solve the problems of poor scalability and high complexity of PATTERN compilation and development, and achieve the effect of reducing difficulty and complexity, facilitating expansion, and facilitating code implementation.

Active Publication Date: 2020-12-29
武汉精鸿电子技术有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at at least one defect or improvement requirement of the prior art, the present invention provides a PATTERN file compilation method, device and electronic equipment, the purpose of which is to compile a test PATTERN file in a structured text format into a binary file, and solve the complicated PATTERN compilation and development The problem of high performance and poor scalability

Method used

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  • A pattern file compiling method, device and electronic equipment
  • A pattern file compiling method, device and electronic equipment
  • A pattern file compiling method, device and electronic equipment

Examples

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Embodiment 2

[0078] This embodiment provides a device for compiling a PATTERN file, which can be implemented in the form of software and / or hardware, and can be integrated on an electronic device to implement the method for compiling a PATTERN file in Embodiment 1; see Figure 4 , the compiling device includes a configuration module, a preprocessing module and a compiling module; wherein,

[0079] The configuration module is used to classify each row of instructions in the PATTERN file, and generate an instruction query table with keywords as key values; the instruction query table stores the mapping relationship between keywords and the types of classification instructions at all levels;

[0080] The preprocessing module is used to preprocess the PATTERN file, store the register declaration corresponding to each module in the PATTERN file in the register list, and store the test vector in the vector list; the preprocessing module takes the smallest compilation unit as the unit Read the in...

Embodiment 3

[0085] This embodiment also provides an electronic device, which includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor executes the PATTERN in Embodiment 1. For the steps of the file compilation method, see Embodiment 1 for the specific steps, and do not repeat them here; in this embodiment, the types of the processor and the memory are not specifically limited, for example: the processor can be a microprocessor, a digital information processor, an on-chip Programmable logic system, etc.; memory can be volatile memory, non-volatile memory or their combination, etc.

[0086] The electronic device can also communicate with one or more external devices (such as keyboards, pointing terminals, displays, etc.), and also communicate with one or more terminals that enable the user to interact with the electronic device, and / or communicate with the A device i...

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Abstract

The invention discloses a PATTERN file compiling method and device and electronic equipment, and the method comprises the steps: classifying all rows of instructions in a PATTERN file, and generatingan instruction query table by employing a keyword as a key value, wherein a mapping relationship between the keyword and the type of each level of classification instruction is stored in the instruction query table; preprocessing the PATTERN file, storing a register statement corresponding to each module in the PATTERN file in a register list, and storing a test vector in a vector list; traversingeach instruction in the register list and the vector list corresponding to each module, searching for a corresponding classification instruction in an instruction query table according to a keyword of the instruction, and storing the classification instruction into a data structure body. According to the method, instructions are graded through the instruction query table, and the instructions inthe register list and the vector list generated by preprocessing are stored in the data structure body according to the grading situation based on the instruction query table, so that the difficulty and the complexity of code development are greatly reduced.

Description

technical field [0001] The invention belongs to the technical field of semiconductor testing, and more specifically relates to a PATTERN file compiling method, device and electronic equipment. Background technique [0002] The test of semiconductor memory (semi-conductor memory) involves repeated operations on different memory addresses such as Block / Page. If you write test files according to the traditional Automatic Test Equipment (ATE) test, you need a lot of space to Store the test vector (PATTERN), so the semiconductor memory test generally uses the Algorithmic Pattern Generator (ALPG) to generate the signals needed by the chip in real time, and the user only needs to write the operation to be executed with a short loop jump instruction. In order to be able to standardize the writing of these instructions, it is necessary to have a set of language specifications, which can be used to check errors in the program, and can generate binary files for FPGA. [0003] At prese...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F8/41
CPCG06F8/41
Inventor 杨坤邓标华
Owner 武汉精鸿电子技术有限公司
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