67results about How to "Reduce the number of instructions" patented technology

The invention provides an operation device. The operation device is used for executing operation according to an extended instruction and comprises a storage, an operation unit and a control unit; theextended instruction comprises an operation code and an operation domain, and the storage is used for storing a vector; the control unit is used for obtaining the extended instruction, analyzing theextended instruction to obtain a vector operation instruction and a second operation instruction, determining the calculation sequence of the vector operation instruction and the second operation instruction according to the vector operation instruction and the second operation instruction and reading an input vector corresponding to an input vector address from the storage; the operation unit isused for executing the vector operation instruction and the second operation instruction on the input vector according to the calculation sequence to obtain a result of the extended instruction. The operation device has the advantages of being low in power consumption and small in calculation expenditure.

The invention set forth herein describes a mechanism for efficiently performing extended precision operations on multi-word source operands. Corresponding data words of the source operands are processed together via each instruction of a cascading sequence of instructions. State information generated when each instruction is processed is stored in condition code flags. The state information is optionally used in the processing of subsequent instructions in the sequence and/or accumulated with previously set state information.

The invention relates to a specific processor system structure for a high-performance programmable controller and an implementation method of the dedicated processor system structure. The specific processor system structure comprises a PLC (Programmable Logic Controller) specific instrument set processor and a general processor, wherein the PLC specific instrument set processor is connected with a general processor through the PLC specific instrument set processor and an interface of the general processor. The implementation method comprises a four-level flow line consisting of a fetch stage,a decoding stage, an executing stage and a writing-back stage, according to the PLC specific instrument set processor. By designing the PLC specific instrument set which accords with the PLC instrument characteristics, the number of instruments for executing a PLC processor is reduced, the execution speed of a PLC program is accelerated, and the processing performance of the PLC processor to a functional block is improved.

A motion estimation technique compares a current macroblock with different reference macroblocks in a reference frame search area. A motion vector for the current macroblock is derived from the reference macroblock most closely matching the current macroblock. To reduce the number of instructions required to load new reference macroblocks, overlapping portions between reference macroblocks are reused and only nonoverlapping portions are loaded into a memory storage device.

The invention discloses an automation positioning method for binary system program vulnerabilities. The method includes: 1) running a binary system program to be detected, and recording all instructions in the process from the time the program starts to run to the time an error occurs; 2) creating a vulnerability dependency tree according to the recorded instructions, and detecting a vulnerability instruction from the recorded instructions according to the created vulnerability dependency tree; in the process of creating the vulnerability dependency tree, checking whether a vulnerability candidate node appears every time a plurality of nodes are increased, if so, generating an interim fix for the vulnerability candidate node; and 3) observing whether the interim fix is effective, if so, stopping creating the vulnerability dependency tree and regarding the interim fix a basis for positioning a vulnerability position; and if not, continuing creating the vulnerability dependency tree. The automation positioning method for the binary system program vulnerabilities reduces the number of instruction needing to be analyzed and greatly improves the analysis efficiency.

The embodiment of the invention discloses a voice interaction method and device of an application program, equipment and a medium, and relates to the technical field of voice. According to the specific implementation scheme, a voice instruction registration request about an application program is responded, a registration voice instruction set supported by the application program in a target program state is obtained, and the registration voice instruction set comprises voice instructions and callback instructions which correspond to the voice instructions and can be recognized by the application program; a user voice instruction is acquired for the application program in the target program state; the user voice instruction matches in a registered voice instruction set, and a callback instruction corresponding to the user voice instruction is determined; and a callback instruction is sent to the application to enable the application to execute an operation matched with the user voice instruction according to the callback instruction. According to the embodiment of the invention, the response accuracy of the user voice instruction can be improved, and the implementation process of the voice interaction function of each application program is simplified.

The invention discloses a kernel fault injection method and an electronic device. The kernel fault injection method is used for solving a technical problem that the latency time for fault injection is long. The kernel fault injection method comprises following steps: when an instruction in a kernel instruction set loaded in a memory is replaced by a breakpoint instruction in a Kprobes (kernel dynamic probes) structure, a processor turns to execute a callback function in the Kprobes structure and related to the breakpoint instruction when the processor executes the breakpoint instruction; and when the processor completes the execution of the callback function, the processor turns to execute a next kernel instruction after a function where the replaced instruction is located returns.

The invention provides a processing apparatus comprising a memory, a register unit, an operation unit and a control unit; the memory stores vectors; the register unit stores a matrix vector multiplication instruction; the control unit acquires the matrix vector multiplication instruction; the matrix vector multiplication instruction is analyzed to obtain an operation a code and an operation field;matrix vector multiplication operational data is obtained from the memory according to the operation code; and the operation unit performs matrix vector multiplication on the data participating in the matrix vector multiplication operation. The technical scheme provided by the invention has advantages of low power dissipation and low operational cost.

The invention relates to an anti-confusion system and a method for software virtual machine protection. After a program is traced and a tracing file is obtained, a heuristic analysis strategy is adopted to analyze a trace file to obtain a software virtual machine instruction set; then the semantics is extracted from the instruction set of the virtual machine; finally, anti-obfuscation is realizedby rewriting and optimizing compilation. The invention aims at the program protected by the commercial software virtual machine vmprotect, the instructions executed by the optimized program are reduced by 2/3 on average, and the program is easy to be modified, thus overcoming the defect of the prior software virtual machine reverse analysis method.

The invention discloses a method for shuffling byte nepit data. The method comprises the steps of: storing byte data to be shuffled in at least two source registers; storing a position number in which the byte data to be shuffled with the quantity same as that of the data stored by a configuration register in the configuration register is located; and shuffling the byte data in the at least two source registers one by one according to the position number in the configuration register. By adopting the technical scheme disclosed by the invention, one source, two sources or three sources can be supported to be shuffled, multi-source shuffling operation is supported, the quantity of commands required in the multi-source data reconfiguration application can be reduced, executing speed of a processor is increased, partial data in a destination register is supported for maintaining and zero clearing, and other parts of normally received and shuffled data and data in the source register are kept unchangeable.

A programmable safety processor consists of program storage, control stack, control decoder, operation decoder, RAM controller, operation executor, operation stack and interface module. It is featured as supporting programmable structure, setting with some basic operation units and utilizing program control and said basic operation unit to realize multiple ciphering deciphering / algorithm.

The invention discloses a data shuffling method, which comprises the following steps of: storing data to be shuffled in two or more source registers; storing a position number, equal to the number of data which can be stored by a configuration register, of the data to be shuffled into the configuration register; and shuffling the data in the two or more source registers one by one according to the position number in the configuration register. By adoption of the technical scheme of the invention, the shuffling of one source, two sources or three sources can be supported; the number of instructions required by rearrangement application of multi-source data can be reduced by supporting multi-source shuffling operation; the execution speed of a processor is improved; maintenance of a part of data in a target register is supported; other parts of shuffled data are normally received; and the data in the source registers keeps invariable.

The invention provides a position signal fast decoding method and system. The method comprises the steps that two pulse signals for measuring are selected and combined to acquire a sampling pulse signal, and the signal accesses a main control chip; the main control chip corrects the sampling pulse signal to calculate the sampling pulse time interval and the number of pulses; and according to the number of pulses and adjacent pulse time interval, a Newton-Raphson method is used for iterative calculation to acquire the pulse frequency and speed. The system comprises a pulse signal processing unit, a correction calculation unit and an iterative calculation unit. According to the invention, the pulse signals are combined; the number of pulse edges can be doubled, which reduces the complexity of chip processing and improves the timing accuracy; in particular, the number of chip instructions can be greatly reduced when parallel processing events are required; compensation and correction methods can be combined to simultaneously improve the counting accuracy of the pulse frequency; the calculation accuracy is greatly improved; and the method and system can be widely applied in the field of integrated circuits.

The invention relates to the technical field of computers, in particular to a virtual scene rendering method and device, a storage medium and electronic equipment. The virtual scene rendering method comprises the following steps: configuring a spline line of a flowing area in a three-dimensional scene, and generating a target grid based on the spline line; calculating a flow vector according to the tangential direction of the spline line and the topographic parameters of the flow area; calculating foam information according to an intersection area of the target grid and the flow area; and calculating a vertex pixel value of the target grid according to the flow vector and the foam information, and rendering the target grid according to the vertex pixel value. According to the virtual scene rendering method provided by the invention, the steps of virtual scene rendering can be simplified, and the rendering efficiency is improved.

The invention discloses a plc protocol based data collection optimized method, and belongs to the technical field of data collection optimization. The method comprises the following steps that S1) a power supply is switched on, and different parts are connected to the network; S2) communication protocols of a PLC are used, an instruction is sent, a data collector identifies the instruction and then collects data, and obtained data is encrypted; S3) the obtained data is preprocessed and divided into multiple parts; S4) the different parts are found, and analyzed and processed, and the parts after processing and optimization are recovered to a main body; and S5) the processed data is reported to an Internet server via PLC communication protocols, stored in a data memory and then output. Thedata collection optimized method can be used to improve the reliability and operation speed of the system, can be conveniently mastered and operated by a user, and can be used to enhance the safety ofdata file storage.