Neural network processing apparatus and method for executing vector copy instructions thereof

Abstract

The invention provides a processing device, comprising a memory, a register unit, an arithmetic unit and a control unit, a memory storage vector. The register unit stores vector copy instructions, thecontrol unit obtains vector copy instructions, and analyzes the vector copy instructions to obtain an operation code and an operation field. Vector copy operation data from a memory is obtained according to the operation code; an arithmetic unit performs a vector copy operation on the data participating in the vector copy operation. The technical proposal provided by the invention has the advantages of low power consumption and low calculation cost.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a neural network processing device and a method for executing vector copy instructions. Background technique [0002] In modern general-purpose and special-purpose processors, more and more calculation instructions (such as vector instructions) are introduced to perform operations. Vector instructions are instructions that enable the processor to perform vector or matrix operations, such as addition and subtraction of vectors, inner product of vectors, matrix multiplication, and matrix convolution. In the vector instruction, at least one input is a vector or a matrix, or the operation result is a vector or a matrix. Vector instructions can perform parallel calculations by calling the vector processing components inside the processor to improve the operation speed. In the existing vector instructions, the vector or matrix in its operand or result is generally fixed in siz...

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Problems solved by technology

[0004] However, the existing vector operation instructions cannot support the operations of sparse vectors or sparse matrices in sparse neural networks, let alone the operations of variable-scale sparse vectors or sparse matrices, and the current vector operation instructions can only implement one type of operation. For example, one vector instruction can only implement one operation of multiplication and addition, but one vector instruction cannot implement more than two operations, so the existing vector operations have high computational overhead and high energy consumption.

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