13results about How to "Fast access" patented technology

A biological medicine sample multi-channel friction access system comprises, from top to bottom, a sample bottle friction access mechanism, a sample bottle storage unit, an automatic sealing mechanism, a gas conveying mechanism and a transition transfer mechanism, which are sequentially arranged from top to bottom. The sample bottle friction access mechanism, the sample bottle storage unit, the automatic sealing mechanism and the gas conveying mechanism are sequentially arranged from top to bottom. The sample bottle friction access mechanism comprises a support, a sample bottle access unit and a sample bottle access driving mechanism. The sample bottle access driving mechanism drives the sample bottle transfer channel or the sample bottle storage channel in the sample bottle access unit to be docked with the sample bottle storage unit, or drives the sample bottle storage channel to be docked with the transition transfer mechanism. Each part constitutes a closed sample bottle storage and access system in a temperature control box. The sample bottle containing samples is stored in the sample bottle storage unit. The system realizes closed and efficient storage and batch rapid extraction of samples in an ultra-low temperature environment.

This invention relates to a log access method, apparatus, and storage medium, belonging to the field of embedded software log management technology. Addressing the problems of existing embedded log access systems, such as complexity, high resource consumption, low access efficiency, and poor operability, this invention employs a fast access algorithm based on time-address mapping. It directly calculates the physical storage address of the log using time information, eliminating the need for a file system and mapping table, and requiring no additional data structures. This invention features a simple algorithm, high efficiency, and low resource consumption, enabling rapid log location and stable access. It is suitable for resource-constrained scenarios such as embedded devices, effectively balancing the reliability, timeliness, and operability of log access.

A cache memory and a management method of the cache memory are disclosed. The cache memory includes a storage circuit, a buffer circuit and a control circuit. The buffer circuit stores data in a first-in-first-out manner. The control circuit is coupled to the storage circuit and the buffer circuit, and is used to find a storage space in the storage circuit and write the data into the storage space.

This invention provides a method for transmitting railway Building Information Modeling (BIM) model files based on distributed storage. The method includes: lightweight decomposing the railway BIM model file into multiple sub-files; distributing these sub-files across edge server nodes using a cloud server; transmitting the sub-file list to a gateway; constructing a BIMdex index model; training the BIMdex index model using a training dataset; deploying the trained BIMdex index model locally on the gateway; and when an end device sends a file request carrying a file identifier to the gateway, the BIMdex index model in the gateway queries the sub-file list based on the file identifier, obtains the corresponding BIMdex address index, and returns it to the end device. This invention significantly improves data transmission efficiency by distributing sub-files of the same railway BIM model across multiple physical nodes and combining this with load balancing technology.

This invention discloses a smokeless e-cigarette cartridge and a smokeless electronic cigarette, belonging to the field of electronic cigarette technology. The smokeless e-cigarette cartridge includes a shell, within which an independent and sealed oil storage chamber and an atomizing chamber are separated by an isolation structure. These two chambers are arranged either vertically stacked along the cartridge's axial direction or horizontally arranged side-by-side along the cartridge's radial direction. A connecting trigger component is located between the two chambers, capable of achieving bidirectional communication in response to axial thrust, circumferential torque, or the force required to rotate the cap open. The atomizing chamber is shipped as an oil-free cavity, while the oil storage chamber is completely sealed and pre-filled with dedicated smokeless e-liquid. The e-liquid uses ethanol and water as the sole diluents, with a vapor pressure ≥1.5×10³Pa and kinematic viscosity ≤3mm² / s at 25℃. This invention structurally isolates the highly volatile e-liquid from the external environment, resulting in a volatile rate of <1% after 12 months of storage. After connection, the cartridge is moistened within 1-2 seconds, and the atomized aerosol particle size is <1μm, dissipating in 10 seconds with no visible smoke. It is compatible with mainstream 1.5-3ml refillable cartridges and meets the requirements for use in public places.

This application discloses a processing component, a chip, a board, a device, and a processing method for the processing component, relating to the field of chips. The processing component includes: a storage queue consisting of a first-level storage queue and a second-level storage queue, and an output unit. The first-level storage queue includes n entries, and the second-level storage queue includes m entries, where n is less than m. The first-level storage queue is used to perform a read operation based on a query instruction, obtain a first operation result, and send the first operation result to the second-level storage queue and the output unit. The second-level storage queue is used to perform a read operation based on the query instruction and the first operation result, obtain a second operation result, and send the second operation result to the output unit. The output unit is used to return a forward result to the loading pipeline based on the first operation result and the second operation result, wherein the forward result includes first data corresponding to the first operation result or second data corresponding to the second operation result.

This application discloses a coprocessor, hardware acceleration method, device, and medium for post-quantum cryptography algorithms, applied to cloud chips and relating to the field of chip design technology. It includes: a register set divided into a first storage area and a second storage area; a parameter memory for storing auxiliary calculation parameters; multiple parallel butterfly operation units for performing butterfly operations in number-theoretical transformations or inverse number-theoretical transformations to obtain the calculation results; and an access control module connected to the register set, parameter memory, and butterfly operation units, used to simultaneously read the target coefficients of the data to be calculated from the first and second storage areas, and read the corresponding auxiliary calculation parameters from the parameter memory; distribute the target coefficients and auxiliary calculation parameters to multiple butterfly operation units for calculation, and write the calculation results back to the first and second storage areas to update the coefficients. This approach reduces resource consumption and improves computational efficiency while maintaining high parallelism.

The invention discloses a conveying box purging device, a conveying box storage device and a conveying box purging control method.According to the conveying box purging device, a gas outlet pipeline is provided with a first branch and a second branch, the first branch is connected with a suction device, and the control device can control the suction device to suck gas before protective gas is introduced into a conveying box; according to the conveying box, gas in the conveying box is rapidly extracted, protective gas does not need to be used during extraction, waste of the protective gas can be reduced, when the protective gas is introduced subsequently, the protective gas can be introduced into the conveying box more rapidly due to low pressure in the pipeline and the conveying box, the blowing speed of the protective gas is increased, and the blowing efficiency is improved; after the humidity and / or oxygen concentration in the conveying box meets the requirement, under the condition that the gas outlet pipeline is closed, the protective gas is supplied at low flow, and when the protective gas cannot be maintained, purging is carried out at relatively large third flow, so that the atmosphere of the protective gas in the conveying box can be maintained to the maximum extent, and the consumption of the protective gas is reduced.

The application provides a wind turbine operation and maintenance management method based on a knowledge graph, comprising the following steps: performing text content and feature analysis and preprocessing, dividing entity types according to the similarities and differences of entity properties, giving constraint definitions for the relationships of entity types at various levels, and extracting entity words for wind farm operation and maintenance by using a rule matching algorithm based on an improved TextRank; defining the relationships between various entities according to field texts, and realizing the relationship linkage between different entities by using an entity relationship extraction algorithm based on rule matching; constructing a safety management procedure graph and a device operation and maintenance requirement graph established based on a protégé wind power equipment ontology instance topological relationship library; realizing the visualization of the knowledge graph for wind turbine operation and maintenance management, and forming an application scheme by using a query language and a graph embedding technology. Compared with the prior art, the application has the advantages of high accuracy, high efficiency and strong field professional application.

This disclosure provides a semiconductor structure and its fabrication method. The structure includes: a plurality of active regions stacked in a vertical direction, the active regions extending in a first horizontal direction, and the plurality of active regions located on the same layer being spaced apart in a second horizontal direction, the first horizontal direction and the second horizontal direction intersecting; word lines covering a portion of the active regions and extending in the second horizontal direction; a plurality of bit lines spaced apart in the second horizontal direction, the bit lines extending in a vertical direction and connected to one end of the active regions; and an air gap structure including a first sub-section and a second sub-section, the first sub-section extending in a vertical direction and located at least between adjacent bit lines in the second horizontal direction, and the second sub-section located at least between adjacent word lines arranged in the vertical direction.

This invention provides a secure payment method and system. By compressing and storing the blockchain in compressed blocks of a compressed chain using addresses, the system efficiency is improved through the compressed chain approach. The leaf blocks point to the parent hash of the compressed block. After each payment, the total payment amount in the leaf block is updated, and the block hash in the compressed block is updated. During authentication, the total payment amount information in the leaf block is directly accessed. Due to the short length and small byte size of the compressed chain, access speed is fast. This invention solves the performance and trust issues of slow authentication speed after blockchain data increments. This invention achieves a decentralized transaction, payment, and authentication method, ensuring transaction reliability and traceability, improving computational efficiency and reliability, and saving computation time.

This invention relates to the field of game resource packaging and incremental updates, and particularly to a method and terminal for optimizing application resource loading. The method includes: packaging multiple discrete resource files of the application to generate a resource package file; mapping the resource package file into memory to form a resource memory mapping area; intercepting the application's resource loading function call request, and redirecting the resource loading path in the call request to the resource memory mapping area to read the corresponding resource data from memory. This method avoids the plaintext release of resource files on disk and the exposure of directory characteristics, directly loading resources from the memory mapping area, eliminating the security risks and fragmentation problems caused by disk file release, and improving resource loading efficiency through direct memory access.

The invention discloses an electromagnetic transient simulation matrix solving method based on an NUMA (Non Uniform Memory Access) architecture and Shuercomplement, which relates to the technical field of electromagnetic transient simulation, and comprises the following steps: S1, carrying out row and column rearrangement on a sparse dispersion nano matrix of electromagnetic transient simulation through permutation transformation, so that the sparse dispersion nano matrix is in a block diagonal edge adding form, a global solving problem is decoupled into a plurality of independent subdomain elimination problems and a low-latitude Schel complement matrix interface problem; and S2, establishing a mapping model of the computing sub-domain and the CPU physical architecture. According to the electromagnetic transient simulation matrix solving method based on the NUMA architecture and the Shuer complement, through an innovative matrix decomposition and hardware resource optimization strategy, the calculation efficiency of electromagnetic transient simulation is remarkably improved, the weak coupling characteristic of a power network is ingeniously utilized, and the calculation efficiency of the electromagnetic transient simulation is improved. A large-scale sparse matrix is decomposed into a plurality of independent low-dimensional sub-domain matrixes and a low-dimensional Schel complement interface matrix, and parallel processing of calculation tasks is achieved.