Vectorization representation method and device for nodes in abstract syntax tree

A technology of abstract syntax tree and representation device, which is applied in the computer field and can solve the problems of loss of node information and inability to represent nodes in abstract syntax trees by vectorization, etc.

Pending Publication Date: 2020-12-04
BEIJING TOPSEC NETWORK SECURITY TECH +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practice, it is found that the existing vectorized representation method only uses its child nodes and discards sibling nodes and grandchildren nodes, resulting in the loss of node information
It can be seen that the existing vectorized representation method of the nodes in the abstract syntax tree cannot accurately represent the vectorized representation of the nodes in the abstract syntax tree

Method used

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  • Vectorization representation method and device for nodes in abstract syntax tree
  • Vectorization representation method and device for nodes in abstract syntax tree
  • Vectorization representation method and device for nodes in abstract syntax tree

Examples

Experimental program
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Embodiment 1

[0054] seefigure 1 , figure 1 An embodiment of the present application provides a schematic flowchart of a method for vectorized representation of nodes in an abstract syntax tree. Wherein, the vectorized representation method of the node in the abstract syntax tree includes:

[0055] S101. Obtain an abstract syntax tree to be processed.

[0056] In the embodiment of the present application, the execution body of the method may be an electronic device such as a computer, a server, a smart phone, a tablet computer, etc., which is not limited in this embodiment.

[0057] In the embodiments of the present application, an abstract syntax tree (Abstract Syntax Tree, AST), also called a syntax tree (Syntax tree), is an abstract representation of the syntax structure of source code data. The abstract syntax tree represents the syntax structure of the programming language in the form of a tree, and each node on the tree represents a structure in the source code data.

[0058] In th...

Embodiment 2

[0075] see figure 2 , figure 2 A schematic flowchart of a method for vectorized representation of nodes in an abstract syntax tree provided by an embodiment of the present application. like figure 2 shown, wherein, the vectorized representation method of the node in the abstract syntax tree includes:

[0076] S201, constructing an original processing model.

[0077] In the embodiment of the present application, the original processing model may specifically be a Long Short-Term Memory (LSTM, Long Short-Term Memory) model, etc., which is not limited in the embodiment of the present application.

[0078] S202. Acquire training data and preset model parameters for training the original processing model, where the preset model parameters at least include an encoding dimension value and a preset cost function of the encoding sequence to be processed.

[0079] S203: Set the number of neurons in the output layer of each model unit in the original processing model as the coding...

Embodiment 3

[0108] see image 3 , image 3 This is a schematic structural diagram of an apparatus for vectorized representation of a node in an abstract syntax tree provided by an embodiment of the present application. like image 3 As shown, the vectorized representation means for nodes in the abstract syntax tree includes:

[0109] The obtaining module 310 is configured to obtain the abstract syntax tree to be processed.

[0110] The traversal module 320 is configured to perform breadth-first traversal on the abstract syntax tree to obtain the first sequence, and perform depth-first traversal on the abstract syntax tree to obtain the second sequence.

[0111] The encoding module 330 is configured to generate an encoding sequence to be processed according to the first sequence and the second sequence.

[0112] The model processing module 340 is configured to process the coding sequence to be processed through a pre-built vectorization processing model to obtain a vectorized represent...

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Abstract

The embodiment of the invention provides a vectorization representation method and device for nodes in an abstract syntax tree, and relates to the technical field of computers. The vectorization representation method for the nodes in the abstract syntax tree comprises the steps: obtaining the abstract syntax tree to be processed; then performing breadth-first traversal on the abstract syntax treeto obtain a first sequence, and performing depth-first traversal on the abstract syntax tree again to obtain a second sequence; further, generating a to-be-processed coding sequence according to the first sequence and the second sequence; and finally, processing the to-be-processed coding sequence through a pre-constructed vectorization processing model to obtain a vectorization representation result of the nodes in the abstract syntax tree. Visibly, the method can completely cover all nodes in the abstract syntax tree, so that vectorized representation can be accurately carried out on the nodes in the abstract syntax tree.

Description

technical field [0001] The present application relates to the field of computer technology, and in particular, to a method and device for vectorized representation of nodes in an abstract syntax tree. Background technique [0002] An abstract syntax tree (AST) or syntax tree is a tree representation of an abstract syntax structure of source code data written in a programming language, each node of the tree representing a construct that occurs in the source code data. In the existing vectorized representation method of the node in the abstract syntax tree, the child nodes of the node in the abstract syntax tree are usually directly encoded to obtain the vectorized representation of the node in the abstract syntax tree. In practice, it is found that existing vectorized representation methods only use their child nodes and discard sibling nodes and grandchild nodes, resulting in loss of node information. It can be seen that the existing vectorized representation methods of nod...

Claims

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Application Information

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IPC IPC(8): G06F8/30G06F8/41G06N3/04G06N3/08
CPCG06F8/31G06F8/427G06F8/44G06N3/049G06N3/08G06N3/047G06N3/044G06N3/045Y02D10/00
Inventor董叶豪刘盈
OwnerBEIJING TOPSEC NETWORK SECURITY TECH