Packaging structure based on silicon-based packaging substrate
A technology for packaging substrates and packaging structures, which is applied in the direction of electrical components, electric solid devices, circuits, etc., can solve problems such as wiring difficulties, crosstalk, and signal transmission distortion, and achieve precise control of impedance control, good signal transmission performance, and signal integrity sex better effect
Pending Publication Date: 2021-02-02
CHENGDU SINO MICROELECTRONICS TECH CO LTD
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AI Technical Summary
Problems solved by technology
For high-density signal traces with many chip pins, many traces will cause wiring difficulties, and close traces will cause serious crosstalk and other problems.
[0007] 2. The printed circuit board process is rougher than the chip manufacturing process
It is difficult for printed circuit boards to control the precision of impedance control. Poor impedance control will affect the signal integrity of the signal line and cause signal transmission distortion
[0008] 3. The printed circuit board itself cannot integrate capacitors, resistors, inductors, MOS tubes, diodes and other devices
The cost of gold wire is relatively high, and the welding process has certain requirements on the position of the pads of the chip. Generally, the pads of the chip are required to be arranged around the entire chip, so there is a limit to the number of pads, and some circuits in the middle of the chip have to Run very long traces all around the chip
Method used
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Embodiment Construction
[0030] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0031] The basic structure of the packaging structure of the present invention is as Figure 4 and Figure 5 shown. The package structure of the present invention includes a chip carried, a silicon-based package substrate, a strength-reinforced substrate, a pad and a package shell, Figure 4 and Figure 5 The difference is that the positions of the strength-enhanced substrate and the silicon-based packaging substrate are different: Figure 4 The strength-enhanced substrate is under the silicon-based packaging substrate, Figure 5 The strength-enhancing substrate is on the silicon-based packaging substrate; in addition Figure 5 Cases also include protective coatings. In the figure, chip 1 and chip 2 are used to indicate the chips carried by the packaging substrate, and chip 1 and chip 2 represent the integrated circuit functional part of...
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The invention belongs to the field of integrated circuit design and packaging. A silicon-based packaging substrate is used as a packaging substrate to replace a printed circuit board. The packaging structure comprises a bearing chip, the silicon-based packaging substrate, a strength reinforcing substrate, a packaging bonding pad and a packaging shell. The silicon-based packaging substrate leads anelectric signal to the packaging bonding pad from the input / output bonding pad of the bearing chip through the metal wire; and the strength reinforcing substrate is used for reinforcing the stress strength and heat dissipation of the packaging structure, is arranged on the silicon-based packaging substrate and is connected with the silicon-based packaging substrate, or is arranged below the silicon-based packaging substrate and is connected with the silicon-based packaging substrate. Wiring is easy, wiring interference is small, signal distortion is small, active and passive devices are easyto integrate, and chip welding is easy.
Description
technical field [0001] The invention belongs to the field of integrated circuit design and packaging, and is applied to the fields of integrated circuit multi-wafer packaging, high-performance advanced technology chip packaging, etc., and specifically relates to a packaging structure in which a silicon-based packaging substrate replaces a printed circuit board as the packaging substrate. Background technique [0002] The 2.5D CoS (Chip on Substrate) packaging structure in the prior art is as follows figure 1 shown. Chip 1 and Chip 2 mainly implement integrated circuit functions. The silicon-based silicon via interposer (TSVSi Interposer, TSV is the English abbreviation of Throughsiliconvia) has two main functions: to interconnect the signals of chip 1 and chip 2, and realize chip 1 or chip 2 and the traditional packaging substrate (Package substrate) conduction. The traditional packaging substrate is composed of a printed circuit board (PCB) with a small area. The traces ...
Claims
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IPC IPC(8): H01L23/043H01L23/12H01L25/16
CPCH01L23/043H01L23/12H01L25/165
Inventor湛伟马淑彬丛伟林
OwnerCHENGDU SINO MICROELECTRONICS TECH CO LTD