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Manufacturing method of semiconductor structure and semiconductor structure

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, transistors, electric solid-state devices, etc., can solve the problems of small transistor structure size, lower threshold voltage of dynamic random access memory, affecting the performance of dynamic random access memory, etc., to achieve Improve the effect of lowering the threshold voltage, increasing the length, and improving the storage performance

Active Publication Date: 2022-05-03
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] As the integration of DRAM is getting higher and higher, the structure size of transistors is getting smaller and smaller, which makes DRAM have short channel effect, which is easy to cause the threshold of DRAM. Voltage reduction, which in turn affects the performance of DRAM

Method used

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  • Manufacturing method of semiconductor structure and semiconductor structure
  • Manufacturing method of semiconductor structure and semiconductor structure
  • Manufacturing method of semiconductor structure and semiconductor structure

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Embodiment Construction

[0100] With the development trend of semiconductor structures tending to be integrated and miniaturized, the manufacturing process of semiconductor structures is getting smaller and smaller, resulting in shorter and shorter gate channels. Too short gate channels will affect the performance of metal oxide semiconductor transistors. An effect that affects the performance of a semiconductor structure due to the shortening of the gate channel is called the short-channel effect. When the short-channel effect occurs in the semiconductor structure, the short-channel effect is likely to cause a decrease in the threshold voltage of the semiconductor, which in turn affects the storage performance of the semiconductor structure. .

[0101] For example, if figure 1 As shown, in the related art, the shape of the gate trench is usually U-shaped. When the length of the gate trench is reduced to the order of tens of nanometers or even a few nanometers, the depletion regions of the source and ...

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Abstract

The invention provides a method for manufacturing a semiconductor structure and a semiconductor structure, and relates to the field of semiconductor technology. The method for manufacturing the semiconductor structure includes: providing a substrate in which an active region and an isolation region are formed; forming a trench in the active region, The groove includes a first groove located at the upper part and a second groove located at the lower part and communicated with the first groove, the width of the first groove is greater than the width of the second groove; between the first groove and the second groove A gate structure is formed inside. In the present invention, the width of the first groove is greater than the width of the second groove, so that the shape of the groove is an inverted convex shape, that is, the side wall of the groove includes the first section, the second section and the second section connected in sequence. Three sections, the second section and the first section are perpendicular to each other. Compared with the U-shaped groove shape, the length of the side wall of the groove can be increased without increasing the depth of the groove, and the short channel effect is improved. The resulting defect lowers the threshold voltage, improving the memory performance of the semiconductor structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor structure and the semiconductor structure. Background technique [0002] A dynamic random access memory (DRAM for short) is a semiconductor memory capable of writing and reading data at high speed and randomly, and is widely used in data storage devices or devices. [0003] Dynamic random access memory is composed of multiple repeated memory cells, each memory cell usually includes a capacitor structure and a transistor, the gate of the transistor is connected to the word line, the drain is connected to the bit line, and the source is connected to the capacitor structure; the word line The voltage signal above can control the opening or closing of the transistor, and then read the data information stored in the capacitor structure through the bit line, or write the data information into the capacitor structure through the bit line...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/108
CPCH10B12/01H10B12/30
Inventor 宛伟王盼王学生
Owner CHANGXIN MEMORY TECH INC