A method, system, device and storage medium for improving flash memory read speed

A technology of reading speed and flash memory, applied in a method, system, device and storage medium field to improve the reading speed of flash memory, can solve the problems affecting the performance of NAND controller, slow reading speed of NAND Flash, etc., to reduce the number of re-reads , the effect of improving the reading speed

Active Publication Date: 2022-07-05
SHENZHEN SANDIYIXIN ELECTRONICS CO LTD
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Problems solved by technology

At this time, it is necessary to re-read (Read Retry) the ECC block, that is, change the offset of the current read voltage through parameter adjustment, re-read the data and cooperate with ECC for error correction. If the parameter adjustment method is unreasonable, it will cause multiple reads and errors. Checking, thus affecting the performance of the NAND controller due to too many read times, resulting in a very slow read speed of NAND Flash

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  • A method, system, device and storage medium for improving flash memory read speed
  • A method, system, device and storage medium for improving flash memory read speed
  • A method, system, device and storage medium for improving flash memory read speed

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[0040] In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the following is combined with the appendix Figure 1-5 and Examples, the present application will be further described in detail. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

[0041] In NAND Flash flash memory, floating gate field effect transistor (Floating Gate FET) is used as the basic storage unit to store data. The floating gate field effect transistor has four terminal electrodes, namely source (Source), drain (Drain), control Gate (Control Gate) and Floating Gate (Floating Gate), the main difference between Flash and ordinary MOS transistors is the floating gate. Flash characterizes '0' and '1' by injecting and releasing charges through the floating gate. When charge is injected into the floating gate, there is a conductive chan...

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Abstract

The present application relates to the field of storage devices, and in particular, to a method, system, device and storage medium for improving the reading speed of flash memory. The method includes: outputting a reread instruction in response to a start instruction; sequentially calling voltage thresholds in response to the reread instruction The different voltage threshold gear groups in the gear table are re-read; when the re-read operation is successful, adjust the corresponding voltage threshold gear group to the previous position to form a new voltage threshold gear table for the next Used for reread operations. The application dynamically adjusts the order of voltage threshold gear groups in the voltage threshold gear table, and always ensures that the most effective voltage threshold gear group is ranked first, so as to ensure that the most effective voltage threshold gear group is used first , thereby reducing the number of re-reads and improving the read speed of the flash memory.

Description

technical field [0001] The present application relates to the field of storage devices, and in particular, to a method, system, device and storage medium for improving the reading speed of flash memory. Background technique [0002] NAND Flash is a type of Flash memory and belongs to non-volatile storage devices. Due to the characteristics of NAND Flash, each page of Flash data is divided into one or more ECC blocks. When data is written, each ECC block must be ECC error correction coding; when reading data, each ECC block performs ECC error correction decoding to ensure that the data of this ECC block is correct. The full name of ECC is Error Checking and Correction, which is an error detection and correction algorithm for NAND. In NAND memory cells, some are inherently broken or unstable, and with the continuous use of NAND, there will be more and more bad memory cells. Therefore, the data written by the user to the NAND must be protected by ECC, so that even if some of ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/12G11C16/26
CPCG11C16/12G11C16/26Y02D10/00
Inventor 李俊杰胡来胜张辉张如宏陈向兵
Owner SHENZHEN SANDIYIXIN ELECTRONICS CO LTD
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