Chip verification system and verification method

A verification system and chip technology, which is applied in the direction of instruments, electrical digital data processing, and faulty computer hardware detection, etc., can solve the problems that cannot be applied to the scene of structural change of the frame switch, cannot meet the needs of simultaneous verification, etc., and achieve the solution The effect of poor verification efficiency and networking flexibility

Pending Publication Date: 2021-10-08
新华三半导体技术有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method only meets the verification requirements of a single chip, and cannot meet the simultaneous verification requirements of TM chips and SW chips under the modular switch solution.
Moreover, it cannot be applied to various structural changes when multiple TM chips and multiple SW chips are included in the modular switch.

Method used

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  • Chip verification system and verification method
  • Chip verification system and verification method
  • Chip verification system and verification method

Examples

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Embodiment Construction

[0023] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. Where the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the illustrative examples below are not intended to represent all implementations consistent with this application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application.

[0024] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the application. As used in this application, the singular forms "a," "the," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that the term "and / or" as used herein refers to and includes any and all possible c...

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Abstract

The invention provides a chip verification system and method. The system comprises at least one TM chip and at least one SW chip, at least one serial communication link is disposed between each TM chip and each SW chip, and each TM chip and each SW chip are obtained through employing SystemC modeling, each TM chip and each SW chip are respectively provided with communication service processes corresponding to the serial communication links, each TM chip sends first data to the SW chip through the corresponding serial communication link by using the communication service process in the TM chip, so that the SW chip reads the first data from the corresponding serial communication link by using the communication service process in the SW chip, each SW chip sends second data to the TM chip through the corresponding serial communication link by using the communication service process in the SW chip, so that the TM chip reads the second data from the corresponding serial communication link by using the communication service process in the TM chip.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, and in particular, to a chip verification system and verification method. Background technique [0002] The modular switch generally includes multiple traffic forwarding (Traffic Management, TM) chips and multiple switching (Switch, SW) chips. The TM chip is responsible for packet forwarding, queue management, traffic management and other services, while the SW chip is responsible for cell transfer. For forwarding, the TM chip and the SW chip belong to the same solution, and cooperate to complete the processing of large-scale data packets. The TM chip and the SW chip belong to the design of large-scale integrated circuits. In order to complete the design of the VLSI, the simulation verification model of the chip needs to be established in the pre-research stage of the chip, that is, the TM chip and the SW chip need to be verified, that is, The architecture, algorithms and f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22G06F11/273
CPCG06F11/2242G06F11/2733
Inventor 赵云鹏
Owner 新华三半导体技术有限公司
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