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Decoding method, memory storage device and memory control circuit unit

A decoding method and technology of a storage device, applied in the field of a memory storage device and a memory control circuit unit, and a decoding method

Active Publication Date: 2021-11-30
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, traditionally, the encoding / decoding of block codes and the single-page encoding / decoding of physical pages are independent of each other

Method used

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  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit

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Embodiment Construction

[0036] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

[0037] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module (rewritable non-volatile memory module) and a controller (also called a control circuit). A memory storage device can be used with a host system such that the host system can write data to or read data from the memory storage device.

[0038] figure 1 is a schematic diagram showing a host system, a memory storage device, and an input / output (I / O) device according to an exemplary embodiment of the present invention. figure 2 It is a schematic diagram showing a host system, a memory storage device and an I / O device according to an exemplary embodiment of...

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Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The method comprises the following steps: respectively executing single-frame decoding on a plurality of first data frames read from an entity unit set, wherein the entity unit set comprises a plurality of first entity units in a rewritable nonvolatile memory module; in response to the fact that the overall decoding result of the first data frames meets a first condition, obtaining error evaluation information related to the entity unit set, wherein the error evaluation information reflects the bit error state of the entity unit set; obtaining reliability information according to the error evaluation information; and performing the single frame decoding on a second data frame read from one of the plurality of first entity units according to the reliability information. Therefore, the decoding capability of the data frames in the entity unit set can be improved.

Description

technical field [0001] The invention relates to a memory management technology, and in particular to a decoding method, a memory storage device and a memory control circuit unit. Background technique [0002] Portable electronic devices such as mobile phones and notebook computers have grown rapidly in recent years, and consumers' demand for storage media has also increased rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for built-in Among the various portable electronic devices listed above. [0003] Generally speaking, in order to ensure the correctness of the data in the rewritable non-volatile memory module, the data will be encoded first and then stored in the rewritable non-volatile memory module. When reading data, the data read from the rewritable non-volatile memory module is decoded in an attempt to correc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/14G11C29/18G11C29/42
CPCG11C29/14G11C29/18G11C29/42G11C2029/1802Y02D10/00
Inventor 林玉祥
Owner PHISON ELECTRONICS