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Vertical memory device and preparation method thereof

A storage device, a vertical technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as increased power consumption, achieve the effects of reducing device size, reducing energy consumption, and reducing device costs

Pending Publication Date: 2021-11-30
GTA SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a vertical storage device and its preparation method, which are used to solve the problems of increased power consumption caused by frequent charging of the storage device in the prior art.

Method used

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  • Vertical memory device and preparation method thereof
  • Vertical memory device and preparation method thereof
  • Vertical memory device and preparation method thereof

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Embodiment Construction

[0069]Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention. For example, when describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth should be inc...

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Abstract

The invention provides a vertical memory device and a preparation method thereof. The device comprises a lower logic unit and an upper logic unit, and the upper logic unit is located above the lower logic unit and makes contact with the lower logic unit; the lower logic unit comprises a substrate and a first gate structure layer, a first source region, a first drain region and a first channel region are formed in the substrate, the first channel region is located between the first source region and the first drain region and is adjacent to the first source region and the first drain region, and the first gate structure layer is located on the upper surface of the first channel region; and the upper logic unit comprises a second source region, a second drain region, a second channel region and a second gate structure layer, the second source region, the second drain region, the second channel region and the second gate structure layer are sequentially stacked above the first gate structure layer, the second gate structure layer comprises a second gate dielectric layer and a second gate metal layer, and the second gate dielectric layer is wound in the circumferential direction of the second channel region, the second gate metal layer is wound on the circumference of the second gate dielectric layer, and the drain electrode of the upper logic unit is used as a capacitor of the lower logic unit at the same time. According to the vertical memory device and the preparation method thereof of the invention, dynamic charge refresh time can be reduced.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to storage devices, in particular to a vertical storage device and a preparation method thereof. Background technique [0002] With the development of science and technology and the improvement of people's living standards, higher and higher requirements are put forward for the miniaturization, multi-function and energy consumption reduction of devices, which prompts technicians to work hard in many aspects such as materials and processes, thus The continuous reduction of the size of the integrated circuit device is realized. [0003] In the traditional DRAM structure, metal or metal nitride electrode plates are generally used as capacitors, and the charge storage time on them is extremely short, requiring high-frequency charging for the capacitors, resulting in high energy consumption. It is necessary to introduce a new structure of DRAMs. reduce its energy consumption. Conten...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/792H01L21/336
CPCH01L29/66833H01L29/7926
Inventor 刘金营
Owner GTA SEMICON CO LTD
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